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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5994.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 277f5e74-b920-4c97-6762-08dbd6107214 X-MS-Exchange-CrossTenant-originalarrivaltime: 26 Oct 2023 10:43:52.4725 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: dzHTDdkaXALw8Jd0H5f1A7WGng4x7LY7dF/Dhvji+A61Yz0KaNkqtNFNr+FztPalGJa0F7ampjSBnqe13Y0qFg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR11MB5272 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sorry for late response... comment inline > -----Original Message----- > From: Thomas Monjalon > Sent: Friday, October 13, 2023 9:17 PM > To: Zhang, Qi Z > Cc: Yang, Qiming ; Zeng, ZhichaoX > ; dev@dpdk.org; orika@nvidia.com; > david.marchand@redhat.com; Mcnamara, John > > Subject: Re: [PATCH v5 5/5] doc: add generic flow doc for ice PMD >=20 > 26/09/2023 13:29, Qi Zhang: > > +Generic Flow Support > > +~~~~~~~~~~~~~~~~~~~~ > > + > > +The ice PMD provides support for the Generic Flow API (RTE_FLOW), > > +enabling users to offload various flow classification tasks to the E81= 0 NIC. > > +The E810 NIC's packet processing pipeline consists of the following s= tages: > > + > > +Switch: Supports exact match and limited wildcard matching with a > > +large flow capacity. > > + > > +ACL: Supports wildcard matching with a smaller flow capacity (DCF mode > only). > > + > > +FDIR: Supports exact match with a large flow capacity (PF mode only). > > + > > +Hash: Supports RSS (PF mode only) > > + > > +The ice PMD utilizes the ice_flow_engine structure to represent each > > +of these stages and leverages the rte_flow rule's ``group`` attribute > > +for selecting the appropriate engine for Switch, ACL, and FDIR operati= ons: > > + > > +Group 0 maps to Switch > > +Group 1 maps to ACL > > +Group 2 maps to FDIR > > + > > +In the case of RSS, it will only be selected if a > > +``RTE_FLOW_ACTION_RSS`` action is targeted to no queue group, and the > group attribute is ignored. > > + > > +For each engine, a list of supported patterns is maintained in a > > +global array named ``ice__supported_pattern``. The Ice PMD > > +will reject any rule with a pattern that is not included in the suppor= ted list. >=20 > Why not choosing the right engine automatically? >=20 > You are defining an API (group number specialization) which is specific t= o this > driver. OK, let me know if my understanding is correct or not. I think the implementation somehow broken below description in rte_flow doc= ument. "Groups are not linked by default, so the logical hierarchy of groups must = be explicitly defined by flow rules themselves in each group using the JUMP= action to define the next group to redirect to. " Could a fix like below works ? Or any better suggestion? 1. Initially, map the switch to group 0, as it represents the first stage i= n the hardware pipeline. 2. For ACL usage, users should create a rule in group 0 with a JUMP action = that includes an arbitrarily group ID. then, the driver will associate this= group with ACL engine. 3. For FDIR usage, users should create a rule within group with a JUM= P action, utilizing a distinct group ID. then, the driver will link this gr= oup with FDIR engine. Thanks Qi > Don't you care about portability of DPDK applications? >=20