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From: "Sebastian, Selwin" <Selwin.Sebastian@amd.com>
To: "Ande, Venkat Kumar" <VenkatKumar.Ande@amd.com>,
	"dev@dpdk.org" <dev@dpdk.org>
Subject: RE: [PATCH v2 15/25] net/axgbe: improve SFP 100Mbps auto-negotiation
Date: Mon, 20 May 2024 10:42:36 +0000	[thread overview]
Message-ID: <DM4PR12MB505584BDF0D6DF39C5446F658DE92@DM4PR12MB5055.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20240507124305.2318-15-venkatkumar.ande@amd.com>

[AMD Official Use Only - AMD Internal Distribution Only]

Acked-by: Selwin Sebastian<selwin.sebastian@amd.com>

-----Original Message-----
From: Ande, Venkat Kumar <VenkatKumar.Ande@amd.com>
Sent: Tuesday, May 7, 2024 6:13 PM
To: dev@dpdk.org
Cc: Sebastian, Selwin <Selwin.Sebastian@amd.com>; Ande, Venkat Kumar <VenkatKumar.Ande@amd.com>
Subject: [PATCH v2 15/25] net/axgbe: improve SFP 100Mbps auto-negotiation

After changing speed to 100Mbps as a result of auto-negotiation (AN), some 10/100/1000Mbps SFPs indicate a successful link (no faults or loss of signal), but cannot successfully transmit or receive data.  These SFPs required an extra auto-negotiation (AN) after the speed change in order to operate properly.  Add a quirk for these SFPs so that if the outcome of the AN actually results in changing to a new speed, re-initiate AN at that new speed.

Signed-off-by: Venkat Kumar Ande <venkatkumar.ande@amd.com>
---
 drivers/net/axgbe/axgbe_ethdev.h   |  1 +
 drivers/net/axgbe/axgbe_mdio.c     | 73 ++++++++++++++++--------------
 drivers/net/axgbe/axgbe_phy_impl.c |  5 ++
 3 files changed, 46 insertions(+), 33 deletions(-)

diff --git a/drivers/net/axgbe/axgbe_ethdev.h b/drivers/net/axgbe/axgbe_ethdev.h
index d1fac667c2..b9d8a4e74f 100644
--- a/drivers/net/axgbe/axgbe_ethdev.h
+++ b/drivers/net/axgbe/axgbe_ethdev.h
@@ -658,6 +658,7 @@ struct axgbe_port {
        enum axgbe_an an_state;
        enum axgbe_rx kr_state;
        enum axgbe_rx kx_state;
+       unsigned int an_again;
        unsigned int an_supported;
        unsigned int parallel_detect;
        unsigned int fec_ability;
diff --git a/drivers/net/axgbe/axgbe_mdio.c b/drivers/net/axgbe/axgbe_mdio.c index e1a737cf62..faa7cdbf0a 100644
--- a/drivers/net/axgbe/axgbe_mdio.c
+++ b/drivers/net/axgbe/axgbe_mdio.c
@@ -200,13 +200,14 @@ static void axgbe_switch_mode(struct axgbe_port *pdata)
        axgbe_change_mode(pdata, pdata->phy_if.phy_impl.switch_mode(pdata));
 }

-static void axgbe_set_mode(struct axgbe_port *pdata,
+static bool axgbe_set_mode(struct axgbe_port *pdata,
                           enum axgbe_mode mode)
 {
        if (mode == axgbe_cur_mode(pdata))
-               return;
+               return false;

        axgbe_change_mode(pdata, mode);
+       return true;
 }

 static bool axgbe_use_mode(struct axgbe_port *pdata, @@ -882,21 +883,22 @@ static int axgbe_phy_config_fixed(struct axgbe_port *pdata)
        return 0;
 }

-static int __axgbe_phy_config_aneg(struct axgbe_port *pdata)
+static int __axgbe_phy_config_aneg(struct axgbe_port *pdata, bool
+set_mode)
 {
        int ret;

+       pthread_mutex_lock(&pdata->an_mutex);
        rte_bit_relaxed_set32(AXGBE_LINK_INIT, &pdata->dev_state);
        pdata->link_check = rte_get_timer_cycles();

        ret = pdata->phy_if.phy_impl.an_config(pdata);
        if (ret)
-               return ret;
+               goto out;

        if (pdata->phy.autoneg != AUTONEG_ENABLE) {
                ret = axgbe_phy_config_fixed(pdata);
                if (ret || !pdata->kr_redrv)
-                       return ret;
+                       goto out;
                PMD_DRV_LOG(DEBUG, "AN redriver support\n");
        } else {
                PMD_DRV_LOG(DEBUG, "AN PHY configuration\n"); @@ -906,23 +908,26 @@ static int __axgbe_phy_config_aneg(struct axgbe_port *pdata)
        rte_intr_disable(pdata->pci_dev->intr_handle);

        /* Start auto-negotiation in a supported mode */
-       if (axgbe_use_mode(pdata, AXGBE_MODE_KR)) {
-               axgbe_set_mode(pdata, AXGBE_MODE_KR);
-       } else if (axgbe_use_mode(pdata, AXGBE_MODE_KX_2500)) {
-               axgbe_set_mode(pdata, AXGBE_MODE_KX_2500);
-       } else if (axgbe_use_mode(pdata, AXGBE_MODE_KX_1000)) {
-               axgbe_set_mode(pdata, AXGBE_MODE_KX_1000);
-       } else if (axgbe_use_mode(pdata, AXGBE_MODE_SFI)) {
-               axgbe_set_mode(pdata, AXGBE_MODE_SFI);
-       } else if (axgbe_use_mode(pdata, AXGBE_MODE_X)) {
-               axgbe_set_mode(pdata, AXGBE_MODE_X);
-       } else if (axgbe_use_mode(pdata, AXGBE_MODE_SGMII_1000)) {
-               axgbe_set_mode(pdata, AXGBE_MODE_SGMII_1000);
-       } else if (axgbe_use_mode(pdata, AXGBE_MODE_SGMII_100)) {
-               axgbe_set_mode(pdata, AXGBE_MODE_SGMII_100);
-       } else {
-               rte_intr_enable(pdata->pci_dev->intr_handle);
-               return -EINVAL;
+       if (set_mode) {
+               if (axgbe_use_mode(pdata, AXGBE_MODE_KR)) {
+                       axgbe_set_mode(pdata, AXGBE_MODE_KR);
+               } else if (axgbe_use_mode(pdata, AXGBE_MODE_KX_2500)) {
+                       axgbe_set_mode(pdata, AXGBE_MODE_KX_2500);
+               } else if (axgbe_use_mode(pdata, AXGBE_MODE_KX_1000)) {
+                       axgbe_set_mode(pdata, AXGBE_MODE_KX_1000);
+               } else if (axgbe_use_mode(pdata, AXGBE_MODE_SFI)) {
+                       axgbe_set_mode(pdata, AXGBE_MODE_SFI);
+               } else if (axgbe_use_mode(pdata, AXGBE_MODE_X)) {
+                       axgbe_set_mode(pdata, AXGBE_MODE_X);
+               } else if (axgbe_use_mode(pdata, AXGBE_MODE_SGMII_1000)) {
+                       axgbe_set_mode(pdata, AXGBE_MODE_SGMII_1000);
+               } else if (axgbe_use_mode(pdata, AXGBE_MODE_SGMII_100)) {
+                       axgbe_set_mode(pdata, AXGBE_MODE_SGMII_100);
+               } else {
+                       rte_intr_enable(pdata->pci_dev->intr_handle);
+                       ret = -EINVAL;
+                       goto out;
+               }
        }

        /* Disable and stop any in progress auto-negotiation */ @@ -940,16 +945,7 @@ static int __axgbe_phy_config_aneg(struct axgbe_port *pdata)
        axgbe_an_init(pdata);
        axgbe_an_restart(pdata);

-       return 0;
-}
-
-static int axgbe_phy_config_aneg(struct axgbe_port *pdata) -{
-       int ret;
-
-       pthread_mutex_lock(&pdata->an_mutex);
-
-       ret = __axgbe_phy_config_aneg(pdata);
+out:
        if (ret)
                rte_bit_relaxed_set32(AXGBE_LINK_ERR, &pdata->dev_state);
        else
@@ -960,6 +956,16 @@ static int axgbe_phy_config_aneg(struct axgbe_port *pdata)
        return ret;
 }

+static int axgbe_phy_config_aneg(struct axgbe_port *pdata) {
+       return __axgbe_phy_config_aneg(pdata, true); }
+
+static int axgbe_phy_reconfig_aneg(struct axgbe_port *pdata) {
+       return __axgbe_phy_config_aneg(pdata, false); }
+
 static bool axgbe_phy_aneg_done(struct axgbe_port *pdata)  {
        return pdata->an_result == AXGBE_AN_COMPLETE; @@ -1041,7 +1047,8 @@ static void axgbe_phy_status_result(struct axgbe_port *pdata)

        pdata->phy.duplex = DUPLEX_FULL;

-       axgbe_set_mode(pdata, mode);
+       if (axgbe_set_mode(pdata, mode) && pdata->an_again)
+               axgbe_phy_reconfig_aneg(pdata);
 }

 static int autoneg_time_out(unsigned long autoneg_start_time) diff --git a/drivers/net/axgbe/axgbe_phy_impl.c b/drivers/net/axgbe/axgbe_phy_impl.c
index 4dab2ccad0..87ef8b6048 100644
--- a/drivers/net/axgbe/axgbe_phy_impl.c
+++ b/drivers/net/axgbe/axgbe_phy_impl.c
@@ -556,6 +556,8 @@ static bool axgbe_phy_belfuse_parse_quirks(struct axgbe_port *pdata)
        if (memcmp(&sfp_eeprom->base[AXGBE_SFP_BASE_VENDOR_NAME],
                   AXGBE_BEL_FUSE_VENDOR, strlen(AXGBE_BEL_FUSE_VENDOR)))
                return false;
+       /* For Bel-Fuse, use the extra AN flag */
+       pdata->an_again = 1;

        /* Reset PHY - wait for self-clearing reset bit to clear */
        pdata->phy_if.phy_impl.reset(pdata);
@@ -797,6 +799,9 @@ static void axgbe_phy_sfp_detect(struct axgbe_port *pdata)
        struct axgbe_phy_data *phy_data = pdata->phy_data;
        int ret;

+       /* Clear the extra AN flag */
+       pdata->an_again = 0;
+
        /* Reset the SFP signals and info */
        axgbe_phy_sfp_reset(phy_data);

--
2.34.1


  reply	other threads:[~2024-05-20 10:42 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20240412125013.10498-1-VenkatKumar.Ande@amd.com>
2024-05-07 12:42 ` [PATCH v2 01/25] net/axgbe: fix mdio access for non-zero ports and CL45 PHYs Venkat Kumar Ande
2024-05-07 12:42   ` [PATCH v2 02/25] net/axgbe: reset link when the link never comes back Venkat Kumar Ande
2024-05-20 10:40     ` Sebastian, Selwin
2024-05-07 12:42   ` [PATCH v2 03/25] net/axgbe: fix fluctuations for 1G BELFUSE SFP Venkat Kumar Ande
2024-05-20 10:41     ` Sebastian, Selwin
2024-05-07 12:42   ` [PATCH v2 04/25] net/axgbe: update DMA coherency values Venkat Kumar Ande
2024-05-20 10:41     ` Sebastian, Selwin
2024-05-07 12:42   ` [PATCH v2 05/25] net/axgbe: disable interrupts during device removal Venkat Kumar Ande
2024-05-20 10:41     ` Sebastian, Selwin
2024-05-07 12:42   ` [PATCH v2 06/25] net/axgbe: yellow carp devices do not need rrc Venkat Kumar Ande
2024-05-20 10:41     ` Sebastian, Selwin
2024-05-07 12:42   ` [PATCH v2 07/25] net/axgbe: enable PLL control for fixed PHY modes only Venkat Kumar Ande
2024-05-20 10:41     ` Sebastian, Selwin
2024-05-20 11:25     ` Ferruh Yigit
2024-05-07 12:42   ` [PATCH v2 08/25] net/axgbe: fix the SFP codes check for DAC cables Venkat Kumar Ande
2024-05-20 10:41     ` Sebastian, Selwin
2024-05-07 12:42   ` [PATCH v2 09/25] net/axgbe: fix logic around active and passive cables Venkat Kumar Ande
2024-05-20 10:41     ` Sebastian, Selwin
2024-05-07 12:42   ` [PATCH v2 10/25] net/axgbe: check only the minimum speed for cables Venkat Kumar Ande
2024-05-20 10:42     ` Sebastian, Selwin
2024-05-07 12:42   ` [PATCH v2 11/25] net/axgbe: flow Tx Ctrl Registers are h/w version dependent Venkat Kumar Ande
2024-05-20 10:42     ` Sebastian, Selwin
2024-05-07 12:42   ` [PATCH v2 12/25] net/axgbe: delay AN timeout during KR training Venkat Kumar Ande
2024-05-20 10:42     ` Sebastian, Selwin
2024-05-07 12:42   ` [PATCH v2 13/25] net/axgbe: remove use of comm owned field Venkat Kumar Ande
2024-05-20 10:42     ` Sebastian, Selwin
2024-05-07 12:42   ` [PATCH v2 14/25] net/axgbe: remove field of SFP diagnostic support Venkat Kumar Ande
2024-05-20 10:42     ` Sebastian, Selwin
2024-05-07 12:42   ` [PATCH v2 15/25] net/axgbe: improve SFP 100Mbps auto-negotiation Venkat Kumar Ande
2024-05-20 10:42     ` Sebastian, Selwin [this message]
2024-05-07 12:42   ` [PATCH v2 16/25] net/axgbe: remove unnecessary conversion to bool Venkat Kumar Ande
2024-05-20 10:42     ` Sebastian, Selwin
2024-05-07 12:42   ` [PATCH v2 17/25] net/axgbe: use definitions for mailbox commands Venkat Kumar Ande
2024-05-20 10:42     ` Sebastian, Selwin
2024-05-07 12:42   ` [PATCH v2 18/25] net/axgbe: add support for 10 Mbps speed Venkat Kumar Ande
2024-05-20 10:42     ` Sebastian, Selwin
2024-05-07 12:42   ` [PATCH v2 19/25] net/axgbe: separate C22 and C45 transactions Venkat Kumar Ande
2024-05-20 10:42     ` Sebastian, Selwin
2024-05-07 12:43   ` [PATCH v2 20/25] net/axgbe: replace mii generic macro for c45 with AXGBE Venkat Kumar Ande
2024-05-20 10:43     ` Sebastian, Selwin
2024-05-20 11:25     ` Ferruh Yigit
2024-05-07 12:43   ` [PATCH v2 21/25] net/axgbe: add 2.5GbE support to 10G BaseT mode Venkat Kumar Ande
2024-05-20 10:43     ` Sebastian, Selwin
2024-05-07 12:43   ` [PATCH v2 22/25] net/axgbe: add support for Rx adaptation Venkat Kumar Ande
2024-05-20 10:43     ` Sebastian, Selwin
2024-05-07 12:43   ` [PATCH v2 23/25] net/axgbe: fix the false linkup in axgbe PHY status Venkat Kumar Ande
2024-05-20 10:43     ` Sebastian, Selwin
2024-05-20 11:25     ` Ferruh Yigit
2024-05-07 12:43   ` [PATCH v2 24/25] net/axgbe: extend 10Mbps support to MAC version 21H Venkat Kumar Ande
2024-05-20 10:43     ` Sebastian, Selwin
2024-05-07 12:43   ` [PATCH v2 25/25] net/axgbe: modify debug messages Venkat Kumar Ande
2024-05-20 10:43     ` Sebastian, Selwin
2024-05-20 10:40   ` [PATCH v2 01/25] net/axgbe: fix mdio access for non-zero ports and CL45 PHYs Sebastian, Selwin
2024-05-20 11:26   ` Ferruh Yigit

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