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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5184.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: d46a936a-306c-4e94-be94-08dca02b52df X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Jul 2024 15:25:11.4005 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: a4uOwg6x5RtVCXC3041VfSH4JYVljNgDP8fysB7FrRZi0uob9tlZNmIvSiYoOjYH1O1xngIf27TMHnq+DmQz7g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYYPR12MB8752 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Hi Itamar & Erez, Typo: NA64 -> NAT64 BR. Bing > -----Original Message----- > From: Itamar Gozlan > Sent: Tuesday, July 9, 2024 8:31 PM > To: Itamar Gozlan ; Erez Shitrit ; > Hamdan Agbariya ; Yevgeny Kliteynik > ; Alex Vesker ; Slava Ovsiienko > ; NBU-Contact-Thomas Monjalon (EXTERNAL) > ; Suanming Mou ; Dariusz > Sosnowski ; Bing Zhao ; Ori Kam > ; Matan Azrad > Cc: dev@dpdk.org; stable@dpdk.org > Subject: [PATCH 8/8] net/mlx5/hws: fix NA64 copy TOS field instead of TTL >=20 > From: Erez Shitrit >=20 > We don't have enough registers to copy TTL and TOS, so we will set TTL to > be the default value (64) and will copy TOS. >=20 > Fixes: 06d969a8c5b8 ("net/mlx5/hws: support NAT64 flow action") > Cc: erezsh@nvidia.com > Cc: stable@dpdk.org >=20 > Signed-off-by: Erez Shitrit > Acked-by: Matan Azrad > --- > drivers/net/mlx5/hws/mlx5dr_action.c | 66 +++++++++++++++++++++++----- > drivers/net/mlx5/hws/mlx5dr_action.h | 2 + > 2 files changed, 56 insertions(+), 12 deletions(-) >=20 > diff --git a/drivers/net/mlx5/hws/mlx5dr_action.c > b/drivers/net/mlx5/hws/mlx5dr_action.c > index 8d3d0033e5..8f6be37818 100644 > --- a/drivers/net/mlx5/hws/mlx5dr_action.c > +++ b/drivers/net/mlx5/hws/mlx5dr_action.c > @@ -315,21 +315,27 @@ mlx5dr_action_create_nat64_copy_state(struct > mlx5dr_context *ctx, > struct mlx5dr_action *action; > uint32_t packet_len_field; > uint8_t *action_ptr; > - uint32_t ttl_field; > + uint32_t tos_field; > + uint32_t tos_size; > uint32_t src_addr; > uint32_t dst_addr; > bool is_v4_to_v6; > + uint32_t ecn; >=20 > is_v4_to_v6 =3D attr->flags & MLX5DR_ACTION_NAT64_V4_TO_V6; >=20 > if (is_v4_to_v6) { > packet_len_field =3D MLX5_MODI_OUT_IPV4_TOTAL_LEN; > - ttl_field =3D MLX5_MODI_OUT_IPV4_TTL; > + tos_field =3D MLX5_MODI_OUT_IP_DSCP; > + tos_size =3D 6; > + ecn =3D MLX5_MODI_OUT_IP_ECN; > src_addr =3D MLX5_MODI_OUT_SIPV4; > dst_addr =3D MLX5_MODI_OUT_DIPV4; > } else { > packet_len_field =3D MLX5_MODI_OUT_IPV6_PAYLOAD_LEN; > - ttl_field =3D MLX5_MODI_OUT_IPV6_HOPLIMIT; > + tos_field =3D MLX5_MODI_OUT_IPV6_TRAFFIC_CLASS; > + tos_size =3D 8; > + ecn =3D 0; > src_addr =3D MLX5_MODI_OUT_SIPV6_31_0; > dst_addr =3D MLX5_MODI_OUT_DIPV6_31_0; > } > @@ -352,7 +358,7 @@ mlx5dr_action_create_nat64_copy_state(struct > mlx5dr_context *ctx, > } >=20 > /* | 8 bit - 8 bit - 16 bit | > - * | ttl - protocol - packet-len | > + * | TOS - protocol - packet-len | > */ > MLX5_SET(copy_action_in, action_ptr, action_type, > MLX5_MODIFICATION_TYPE_COPY); > MLX5_SET(copy_action_in, action_ptr, src_field, packet_len_field); > @@ -377,12 +383,25 @@ mlx5dr_action_create_nat64_copy_state(struct > mlx5dr_context *ctx, > action_ptr +=3D MLX5DR_ACTION_DOUBLE_SIZE; >=20 > MLX5_SET(copy_action_in, action_ptr, action_type, > MLX5_MODIFICATION_TYPE_COPY); > - MLX5_SET(copy_action_in, action_ptr, src_field, ttl_field); > + MLX5_SET(copy_action_in, action_ptr, src_field, tos_field); > MLX5_SET(copy_action_in, action_ptr, dst_field, > attr->registers[MLX5DR_ACTION_NAT64_REG_CONTROL]); > MLX5_SET(copy_action_in, action_ptr, dst_offset, 24); > - MLX5_SET(copy_action_in, action_ptr, length, 8); > + MLX5_SET(copy_action_in, action_ptr, length, tos_size); > action_ptr +=3D MLX5DR_ACTION_DOUBLE_SIZE; > + /* in ipv4 TOS =3D {dscp (6bits) - ecn (2bits) }*/ > + if (ecn) { > + MLX5_SET(copy_action_in, action_ptr, action_type, > MLX5_MODIFICATION_TYPE_NOP); > + action_ptr +=3D MLX5DR_ACTION_DOUBLE_SIZE; > + > + MLX5_SET(copy_action_in, action_ptr, action_type, > MLX5_MODIFICATION_TYPE_COPY); > + MLX5_SET(copy_action_in, action_ptr, src_field, ecn); > + MLX5_SET(copy_action_in, action_ptr, dst_field, > + attr->registers[MLX5DR_ACTION_NAT64_REG_CONTROL]); > + MLX5_SET(copy_action_in, action_ptr, dst_offset, 24 + > tos_size); > + MLX5_SET(copy_action_in, action_ptr, length, > MLX5DR_ACTION_NAT64_ECN_SIZE); > + action_ptr +=3D MLX5DR_ACTION_DOUBLE_SIZE; > + } >=20 > /* set sip and dip to 0, in order to have new csum */ > mlx5dr_action_create_nat64_zero_all_addr(&action_ptr, is_v4_to_v6); > @@ -543,10 +562,13 @@ mlx5dr_action_create_nat64_copy_back_state(struct > mlx5dr_context *ctx, > uint32_t packet_len_field; > uint32_t packet_len_add; > uint8_t *action_ptr; > + uint32_t tos_field; > uint32_t ttl_field; > + uint32_t tos_size; > uint32_t src_addr; > uint32_t dst_addr; > bool is_v4_to_v6; > + uint32_t ecn; >=20 > is_v4_to_v6 =3D attr->flags & MLX5DR_ACTION_NAT64_V4_TO_V6; >=20 > @@ -557,6 +579,9 @@ mlx5dr_action_create_nat64_copy_back_state(struct > mlx5dr_context *ctx, > ttl_field =3D MLX5_MODI_OUT_IPV6_HOPLIMIT; > src_addr =3D MLX5_MODI_OUT_SIPV6_31_0; > dst_addr =3D MLX5_MODI_OUT_DIPV6_31_0; > + tos_field =3D MLX5_MODI_OUT_IPV6_TRAFFIC_CLASS; > + tos_size =3D 8; > + ecn =3D 0; > } else { > packet_len_field =3D MLX5_MODI_OUT_IPV4_TOTAL_LEN; > /* ipv4 len is including 20 bytes of the header, so add 20 > over ipv6 len */ @@ -564,6 +589,9 @@ > mlx5dr_action_create_nat64_copy_back_state(struct mlx5dr_context *ctx, > ttl_field =3D MLX5_MODI_OUT_IPV4_TTL; > src_addr =3D MLX5_MODI_OUT_SIPV4; > dst_addr =3D MLX5_MODI_OUT_DIPV4; > + tos_field =3D MLX5_MODI_OUT_IP_DSCP; > + tos_size =3D 6; > + ecn =3D MLX5_MODI_OUT_IP_ECN; > } >=20 > memset(modify_action_data, 0, sizeof(modify_action_data)); @@ - > 578,20 +606,34 @@ mlx5dr_action_create_nat64_copy_back_state(struct > mlx5dr_context *ctx, > MLX5_SET(copy_action_in, action_ptr, length, 16); > action_ptr +=3D MLX5DR_ACTION_DOUBLE_SIZE; >=20 > - MLX5_SET(copy_action_in, action_ptr, action_type, > MLX5_MODIFICATION_TYPE_NOP); > - action_ptr +=3D MLX5DR_ACTION_DOUBLE_SIZE; > - > - MLX5_SET(copy_action_in, action_ptr, action_type, > MLX5_MODIFICATION_TYPE_NOP); > + MLX5_SET(set_action_in, action_ptr, action_type, > MLX5_MODIFICATION_TYPE_SET); > + MLX5_SET(set_action_in, action_ptr, field, ttl_field); > + MLX5_SET(set_action_in, action_ptr, length, 8); > + MLX5_SET(set_action_in, action_ptr, data, > +MLX5DR_ACTION_NAT64_TTL_DEFAULT_VAL); > action_ptr +=3D MLX5DR_ACTION_DOUBLE_SIZE; >=20 > + /* copy TOS */ > MLX5_SET(copy_action_in, action_ptr, action_type, > MLX5_MODIFICATION_TYPE_COPY); > MLX5_SET(copy_action_in, action_ptr, src_field, > attr->registers[MLX5DR_ACTION_NAT64_REG_CONTROL]); > - MLX5_SET(copy_action_in, action_ptr, dst_field, ttl_field); > + MLX5_SET(copy_action_in, action_ptr, dst_field, tos_field); > MLX5_SET(copy_action_in, action_ptr, src_offset, 24); > - MLX5_SET(copy_action_in, action_ptr, length, 8); > + MLX5_SET(copy_action_in, action_ptr, length, tos_size); > action_ptr +=3D MLX5DR_ACTION_DOUBLE_SIZE; >=20 > + if (ecn) { > + MLX5_SET(copy_action_in, action_ptr, action_type, > MLX5_MODIFICATION_TYPE_NOP); > + action_ptr +=3D MLX5DR_ACTION_DOUBLE_SIZE; > + > + MLX5_SET(copy_action_in, action_ptr, action_type, > MLX5_MODIFICATION_TYPE_COPY); > + MLX5_SET(copy_action_in, action_ptr, src_field, > + attr->registers[MLX5DR_ACTION_NAT64_REG_CONTROL]); > + MLX5_SET(copy_action_in, action_ptr, dst_field, ecn); > + MLX5_SET(copy_action_in, action_ptr, src_offset, 24 + > tos_size); > + MLX5_SET(copy_action_in, action_ptr, length, > MLX5DR_ACTION_NAT64_ECN_SIZE); > + action_ptr +=3D MLX5DR_ACTION_DOUBLE_SIZE; > + } > + > MLX5_SET(copy_action_in, action_ptr, action_type, > MLX5_MODIFICATION_TYPE_NOP); > action_ptr +=3D MLX5DR_ACTION_DOUBLE_SIZE; >=20 > diff --git a/drivers/net/mlx5/hws/mlx5dr_action.h > b/drivers/net/mlx5/hws/mlx5dr_action.h > index faea6bb1f4..ba4ce55228 100644 > --- a/drivers/net/mlx5/hws/mlx5dr_action.h > +++ b/drivers/net/mlx5/hws/mlx5dr_action.h > @@ -79,6 +79,8 @@ enum { > MLX5DR_ACTION_NAT64_IPV4_HEADER =3D 5, > MLX5DR_ACTION_NAT64_IPV6_VER =3D 0x60000000, > MLX5DR_ACTION_NAT64_IPV4_VER =3D 0x45000000, > + MLX5DR_ACTION_NAT64_TTL_DEFAULT_VAL =3D 64, > + MLX5DR_ACTION_NAT64_ECN_SIZE =3D 2, > }; >=20 > /* 3 stages for the nat64 action */ > -- > 2.39.3