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* [PATCH] net/mlx5: fix modify field destination bit offset
@ 2021-11-17 11:14 Viacheslav Ovsiienko
  2021-11-17 14:45 ` Raslan Darawsheh
  0 siblings, 1 reply; 2+ messages in thread
From: Viacheslav Ovsiienko @ 2021-11-17 11:14 UTC (permalink / raw)
  To: dev; +Cc: ferruh.yigit, rasland, matan

If the modify field action requests the field copy/set transaction
from other field, the destination field hardware bit offset was
assigned incorrectly with non-zero byte offset, causing wrong
translations for the fields with sizes larger than 32 bits.

Fixes: 40c8fb1fd3b3 ("net/mlx5: update modify field action")

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_dv.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 7b32c06fc6..2705cadaf1 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -1501,7 +1501,7 @@ mlx5_flow_field_id_to_modify_info
 						    (32 - width)) << off);
 		} else {
 			if (data->offset < 16)
-				info[idx++] = (struct field_modify_info){2, 4,
+				info[idx++] = (struct field_modify_info){2, 0,
 						MLX5_MODI_OUT_DMAC_15_0};
 			info[idx] = (struct field_modify_info){4, 0,
 						MLX5_MODI_OUT_DMAC_47_16};
@@ -1531,7 +1531,7 @@ mlx5_flow_field_id_to_modify_info
 						    (32 - width)) << off);
 		} else {
 			if (data->offset < 16)
-				info[idx++] = (struct field_modify_info){2, 4,
+				info[idx++] = (struct field_modify_info){2, 0,
 						MLX5_MODI_OUT_SMAC_15_0};
 			info[idx] = (struct field_modify_info){4, 0,
 						MLX5_MODI_OUT_SMAC_47_16};
@@ -1645,13 +1645,13 @@ mlx5_flow_field_id_to_modify_info
 			mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
 		} else {
 			if (data->offset < 32)
-				info[idx++] = (struct field_modify_info){4, 12,
+				info[idx++] = (struct field_modify_info){4, 0,
 						MLX5_MODI_OUT_SIPV6_31_0};
 			if (data->offset < 64)
-				info[idx++] = (struct field_modify_info){4, 8,
+				info[idx++] = (struct field_modify_info){4, 0,
 						MLX5_MODI_OUT_SIPV6_63_32};
 			if (data->offset < 96)
-				info[idx++] = (struct field_modify_info){4, 4,
+				info[idx++] = (struct field_modify_info){4, 0,
 						MLX5_MODI_OUT_SIPV6_95_64};
 			if (data->offset < 128)
 				info[idx++] = (struct field_modify_info){4, 0,
@@ -1713,13 +1713,13 @@ mlx5_flow_field_id_to_modify_info
 			mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
 		} else {
 			if (data->offset < 32)
-				info[idx++] = (struct field_modify_info){4, 12,
+				info[idx++] = (struct field_modify_info){4, 0,
 						MLX5_MODI_OUT_DIPV6_31_0};
 			if (data->offset < 64)
-				info[idx++] = (struct field_modify_info){4, 8,
+				info[idx++] = (struct field_modify_info){4, 0,
 						MLX5_MODI_OUT_DIPV6_63_32};
 			if (data->offset < 96)
-				info[idx++] = (struct field_modify_info){4, 4,
+				info[idx++] = (struct field_modify_info){4, 0,
 						MLX5_MODI_OUT_DIPV6_95_64};
 			if (data->offset < 128)
 				info[idx++] = (struct field_modify_info){4, 0,
-- 
2.18.1


^ permalink raw reply	[flat|nested] 2+ messages in thread

* RE: [PATCH] net/mlx5: fix modify field destination bit offset
  2021-11-17 11:14 [PATCH] net/mlx5: fix modify field destination bit offset Viacheslav Ovsiienko
@ 2021-11-17 14:45 ` Raslan Darawsheh
  0 siblings, 0 replies; 2+ messages in thread
From: Raslan Darawsheh @ 2021-11-17 14:45 UTC (permalink / raw)
  To: Slava Ovsiienko, dev; +Cc: ferruh.yigit, Matan Azrad

Hi,

> -----Original Message-----
> From: Slava Ovsiienko <viacheslavo@nvidia.com>
> Sent: Wednesday, November 17, 2021 1:15 PM
> To: dev@dpdk.org
> Cc: ferruh.yigit@intel.com; Raslan Darawsheh <rasland@nvidia.com>; Matan
> Azrad <matan@nvidia.com>
> Subject: [PATCH] net/mlx5: fix modify field destination bit offset
> 
> If the modify field action requests the field copy/set transaction
> from other field, the destination field hardware bit offset was
> assigned incorrectly with non-zero byte offset, causing wrong
> translations for the fields with sizes larger than 32 bits.
> 
> Fixes: 40c8fb1fd3b3 ("net/mlx5: update modify field action")
> 
> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>

Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh

^ permalink raw reply	[flat|nested] 2+ messages in thread

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2021-11-17 14:45 ` Raslan Darawsheh

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