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Tue, 13 Dec 2022 08:23:28 +0000 From: Tomasz Duszynski To: =?iso-8859-1?Q?Morten_Br=F8rup?= , "dev@dpdk.org" CC: "thomas@monjalon.net" , Jerin Jacob Kollanukkaran Subject: RE: [PATCH v3 0/4] add support for self monitoring Thread-Topic: [PATCH v3 0/4] add support for self monitoring Thread-Index: AQHZA9T1KwTds3j5+EyGh1tFxaA1Za5VtveAgBXUmdA= Date: Tue, 13 Dec 2022 08:23:28 +0000 Message-ID: References: <20221121121121.3917194-1-tduszynski@marvell.com> <20221129092821.1304853-1-tduszynski@marvell.com> <98CBD80474FA8B44BF855DF32C47DC35D87526@smartserver.smartshare.dk> In-Reply-To: <98CBD80474FA8B44BF855DF32C47DC35D87526@smartserver.smartshare.dk> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-publictraffictype: Email x-ms-traffictypediagnostic: DM4PR18MB4368:EE_|MW3PR18MB3530:EE_ x-ms-office365-filtering-correlation-id: aa98c765-a0e9-41cd-8fa4-08dadce35015 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: marvell.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM4PR18MB4368.namprd18.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: aa98c765-a0e9-41cd-8fa4-08dadce35015 X-MS-Exchange-CrossTenant-originalarrivaltime: 13 Dec 2022 08:23:28.4998 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: w6mbEIyx317Llw7AjQ9T1RM2LjyXqsOXYPc+C2VQcwNL0QtQn4IbE4vSSWpgtvaJyvBdiKxyy2hN93OwaSzPyw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR18MB3530 X-Proofpoint-GUID: l_r9oxvbGTdZAVtP2-7cqrLwlzDRyAea X-Proofpoint-ORIG-GUID: l_r9oxvbGTdZAVtP2-7cqrLwlzDRyAea X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-13_03,2022-12-12_02,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Hi Morten, > -----Original Message----- > From: Morten Br=F8rup > Sent: Tuesday, November 29, 2022 11:43 AM > To: Tomasz Duszynski ; dev@dpdk.org > Cc: thomas@monjalon.net; Jerin Jacob Kollanukkaran > Subject: [EXT] RE: [PATCH v3 0/4] add support for self monitoring >=20 > External Email >=20 > ---------------------------------------------------------------------- > > From: Tomasz Duszynski [mailto:tduszynski@marvell.com] > > Sent: Tuesday, 29 November 2022 10.28 > > > > This series adds self monitoring support i.e allows to configure and > > read performance measurement unit (PMU) counters in runtime without > > using perf utility. This has certain adventages when application runs > > on isolated cores with nohz_full kernel parameter. > > > > Events can be read directly using rte_pmu_read() or using dedicated > > tracepoint rte_eal_trace_pmu_read(). The latter will cause events to > > be stored inside CTF file. > > > > By design, all enabled events are grouped together and the same group > > is attached to lcores that use self monitoring funtionality. > > > > Events are enabled by names, which need to be read from standard > > location under sysfs i.e > > > > /sys/bus/event_source/devices/PMU/events > > > > where PMU is a core pmu i.e one measuring cpu events. As of today raw > > events are not supported. >=20 > Hi Thomasz, >=20 > I am very interested in this patch series for fast path profiling purpose= s. (Not using EAL trace, > but our proprietary profiler.) >=20 > However, it seems that rte_pmu_read() is quite longwinded, compared to rt= e_pmu_pmc_read(). >=20 We need some bit of extra logic to set thigs up before performing reading a= ctual counter but in reality=20 cycles are mostly consumed by rte_pmu_pmc_read(). This obviously differs am= ong platforms so if you want precise measurements you need to get your hands dirty.=20 That said, below are results coming from dpdk-test after running trace_perf= _autotest - just to give you some idea.=20 X86-64 RTE>>trace_perf_autotest Timer running at 3000.00MHz void: cycles=3D17.739375 ns=3D5.913125 u64: cycles=3D17.348296 ns=3D5.782765 int: cycles=3D17.098724 ns=3D5.699575 float: cycles=3D17.099946 ns=3D5.699982 double: cycles=3D17.229702 ns=3D5.743234 string: cycles=3D31.159907 ns=3D10.386636 void_fp: cycles=3D0.679842 ns=3D0.226614 read_pmu: cycles=3D49.325117 ns=3D16.441706 ARM64 with RTE_ARM_EAL_RDTSC_USE_PMU RTE>>trace_perf_autotest Timer running at 2480.00MHz void: cycles=3D9.413568 ns=3D3.795793 u64: cycles=3D9.386003 ns=3D3.784678 int: cycles=3D9.438701 ns=3D3.805928 float: cycles=3D9.359377 ns=3D3.773942 double: cycles=3D9.372279 ns=3D3.779145 string: cycles=3D24.474899 ns=3D9.868911 void_fp: cycles=3D0.505513 ns=3D0.203836 read_pmu: cycles=3D17.442853 ns=3D7.033409 > But perhaps I am just worrying too much, so I will ask: What is the perfo= rmance cost of using > rte_pmu_read() - compared to rte_pmu_pmc_read() - in the fast path? >=20 > If there is a non-negligible difference, could you please provide an exam= ple of how to configure > PMU events and use rte_pmu_pmc_read() in an application? >=20 Series come with some docs so you can check there how to run it.=20 > I would primarily be interested in data cache misses and branch mispredic= tions. But feel free to > make your own choices for the example. Raw events are not supported right now which means you don't have fine cont= rol over all events.=20 You can use only events from CPU PMU (/sys/bus/event_source/devices//e= vents).