From: "Shubhachint, Chaitanya" <Chaitanya.Shubhachint@netscout.com>
To: "dev@dpdk.org" <dev@dpdk.org>
Subject: [dpdk-dev] Build DPDK for different target machine.
Date: Fri, 19 Oct 2018 16:24:40 +0000 [thread overview]
Message-ID: <DM5PR0101MB29542FF39F2EB5103049B65187F90@DM5PR0101MB2954.prod.exchangelabs.com> (raw)
Hello,
I am trying to build DPDK library set (shared) so that there are somewhat portable. I want to build them once on a designated build machine and run them on other machines of similar architecture. I can build DPDK and use it locally successfully but running them on a different target machine always gives me core dump with 'Illegal instruction'.
I am building with
make install T=x86_64-native-linuxapp-gcc
export RTE_TARGET=x86_64-native-linuxapp-gcc
and CONFIG_RTE_BUILD_SHARED_LIB=y
I have tried setting CONFIG_RTE_MACHINE, as "default" or "snb" but that does not help.
Help is much appreciated. Details of Build machine and target machine below:
Thanks
Chai.
Build machine:
DPDK_Build/dpdk-18.08# lscpu
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Little Endian
CPU(s): 8
On-line CPU(s) list: 0-7
Thread(s) per core: 1
Core(s) per socket: 8
Socket(s): 1
NUMA node(s): 1
Vendor ID: GenuineIntel
CPU family: 6
Model: 79
Model name: Intel(R) Xeon(R) CPU E5-2640 v4 @ 2.40GHz
Stepping: 1
CPU MHz: 2399.998
BogoMIPS: 4799.99
Hypervisor vendor: VMware
Virtualization type: full
L1d cache: 32K
L1i cache: 32K
L2 cache: 256K
L3 cache: 25600K
NUMA node0 CPU(s): 0-7
Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts mmx fxsr sse sse2 ss ht syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts nopl xtopology tsc_reliable nonstop_tsc cpuid aperfmperf pni pclmulqdq ssse3 fma cx16 pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand hypervisor lahf_lm abm 3dnowprefetch cpuid_fault epb invpcid_single pti fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 invpcid rtm rdseed adx smap xsaveopt dtherm ida arat pln pts
Target Machine:
$lscpu
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Byte Order: Little Endian
CPU(s): 6
On-line CPU(s) list: 0-5
Thread(s) per core: 1
Core(s) per socket: 6
Socket(s): 1
NUMA node(s): 1
Vendor ID: GenuineIntel
CPU family: 6
Model: 45
Model name: Intel(R) Xeon(R) CPU E5-2667 0 @ 2.90GHz
Stepping: 7
CPU MHz: 1682.069
CPU max MHz: 3500.0000
CPU min MHz: 1200.0000
BogoMIPS: 5785.61
Virtualization: VT-x
L1d cache: 32K
L1i cache: 32K
L2 cache: 256K
L3 cache: 15360K
NUMA node0 CPU(s): 0-5
Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic popcnt tsc_deadline_timer aes xsave avx lahf_lm epb pti tpr_shadow vnmi flexpriority ept vpid xsaveopt ibpb ibrs stibp dtherm ida arat pln pts
next reply other threads:[~2018-10-19 16:24 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-19 16:24 Shubhachint, Chaitanya [this message]
2018-10-20 5:06 ` Shyam Shrivastav
2018-10-22 15:50 ` Shubhachint, Chaitanya
2018-10-22 7:58 ` Ferruh Yigit
2018-10-22 15:49 ` Shubhachint, Chaitanya
2018-10-22 16:11 ` Ferruh Yigit
2018-10-22 18:56 ` Shubhachint, Chaitanya
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