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* [PATCH] net/virtio: remove address width limit for modern devices
@ 2023-03-09 14:36 David Marchand
  2023-03-09 14:59 ` Maxime Coquelin
                   ` (3 more replies)
  0 siblings, 4 replies; 8+ messages in thread
From: David Marchand @ 2023-03-09 14:36 UTC (permalink / raw)
  To: dev; +Cc: andy.pei, Maxime Coquelin, Chenbo Xia

Modern devices don't have the same limitation as legacy devices, because
vring addresses are not configured using a 32-bit register.

Signed-off-by: David Marchand <david.marchand@redhat.com>
---
 drivers/net/virtio/virtio_pci.c | 28 ++++++++--------------------
 1 file changed, 8 insertions(+), 20 deletions(-)

diff --git a/drivers/net/virtio/virtio_pci.c b/drivers/net/virtio/virtio_pci.c
index 9cf4d760b4..29eb739b04 100644
--- a/drivers/net/virtio/virtio_pci.c
+++ b/drivers/net/virtio/virtio_pci.c
@@ -33,22 +33,6 @@
 
 struct virtio_pci_internal virtio_pci_internal[RTE_MAX_ETHPORTS];
 
-static inline int
-check_vq_phys_addr_ok(struct virtqueue *vq)
-{
-	/* Virtio PCI device VIRTIO_PCI_QUEUE_PF register is 32bit,
-	 * and only accepts 32 bit page frame number.
-	 * Check if the allocated physical memory exceeds 16TB.
-	 */
-	if ((vq->vq_ring_mem + vq->vq_ring_size - 1) >>
-			(VIRTIO_PCI_QUEUE_ADDR_SHIFT + 32)) {
-		PMD_INIT_LOG(ERR, "vring address shouldn't be above 16TB!");
-		return 0;
-	}
-
-	return 1;
-}
-
 #define PCI_MSIX_ENABLE 0x8000
 
 static enum virtio_msix_status
@@ -273,8 +257,15 @@ legacy_setup_queue(struct virtio_hw *hw, struct virtqueue *vq)
 {
 	uint32_t src;
 
-	if (!check_vq_phys_addr_ok(vq))
+	/* Virtio PCI device VIRTIO_PCI_QUEUE_PFN register is 32bit,
+	 * and only accepts 32 bit page frame number.
+	 * Check if the allocated physical memory exceeds 16TB.
+	 */
+	if ((vq->vq_ring_mem + vq->vq_ring_size - 1) >>
+			(VIRTIO_PCI_QUEUE_ADDR_SHIFT + 32)) {
+		PMD_INIT_LOG(ERR, "vring address shouldn't be above 16TB!");
 		return -1;
+	}
 
 	rte_pci_ioport_write(VTPCI_IO(hw), &vq->vq_queue_index, 2,
 		VIRTIO_PCI_QUEUE_SEL);
@@ -476,9 +467,6 @@ modern_setup_queue(struct virtio_hw *hw, struct virtqueue *vq)
 	uint64_t desc_addr, avail_addr, used_addr;
 	uint16_t notify_off;
 
-	if (!check_vq_phys_addr_ok(vq))
-		return -1;
-
 	desc_addr = vq->vq_ring_mem;
 	avail_addr = desc_addr + vq->vq_nentries * sizeof(struct vring_desc);
 	used_addr = RTE_ALIGN_CEIL(avail_addr + offsetof(struct vring_avail,
-- 
2.39.2


^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] net/virtio: remove address width limit for modern devices
  2023-03-09 14:36 [PATCH] net/virtio: remove address width limit for modern devices David Marchand
@ 2023-03-09 14:59 ` Maxime Coquelin
  2023-03-09 15:08   ` David Marchand
  2023-03-10  6:10 ` Pei, Andy
                   ` (2 subsequent siblings)
  3 siblings, 1 reply; 8+ messages in thread
From: Maxime Coquelin @ 2023-03-09 14:59 UTC (permalink / raw)
  To: David Marchand, dev; +Cc: andy.pei, Chenbo Xia

Hi David,

On 3/9/23 15:36, David Marchand wrote:
> Modern devices don't have the same limitation as legacy devices, because
> vring addresses are not configured using a 32-bit register.
> 

Do we want to backport it? This is a bug in my opinion.

Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>

Thanks!
Maxime


> Signed-off-by: David Marchand <david.marchand@redhat.com>
> ---
>   drivers/net/virtio/virtio_pci.c | 28 ++++++++--------------------
>   1 file changed, 8 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/net/virtio/virtio_pci.c b/drivers/net/virtio/virtio_pci.c
> index 9cf4d760b4..29eb739b04 100644
> --- a/drivers/net/virtio/virtio_pci.c
> +++ b/drivers/net/virtio/virtio_pci.c
> @@ -33,22 +33,6 @@
>   
>   struct virtio_pci_internal virtio_pci_internal[RTE_MAX_ETHPORTS];
>   
> -static inline int
> -check_vq_phys_addr_ok(struct virtqueue *vq)
> -{
> -	/* Virtio PCI device VIRTIO_PCI_QUEUE_PF register is 32bit,
> -	 * and only accepts 32 bit page frame number.
> -	 * Check if the allocated physical memory exceeds 16TB.
> -	 */
> -	if ((vq->vq_ring_mem + vq->vq_ring_size - 1) >>
> -			(VIRTIO_PCI_QUEUE_ADDR_SHIFT + 32)) {
> -		PMD_INIT_LOG(ERR, "vring address shouldn't be above 16TB!");
> -		return 0;
> -	}
> -
> -	return 1;
> -}
> -
>   #define PCI_MSIX_ENABLE 0x8000
>   
>   static enum virtio_msix_status
> @@ -273,8 +257,15 @@ legacy_setup_queue(struct virtio_hw *hw, struct virtqueue *vq)
>   {
>   	uint32_t src;
>   
> -	if (!check_vq_phys_addr_ok(vq))
> +	/* Virtio PCI device VIRTIO_PCI_QUEUE_PFN register is 32bit,
> +	 * and only accepts 32 bit page frame number.
> +	 * Check if the allocated physical memory exceeds 16TB.
> +	 */
> +	if ((vq->vq_ring_mem + vq->vq_ring_size - 1) >>
> +			(VIRTIO_PCI_QUEUE_ADDR_SHIFT + 32)) {
> +		PMD_INIT_LOG(ERR, "vring address shouldn't be above 16TB!");
>   		return -1;
> +	}
>   
>   	rte_pci_ioport_write(VTPCI_IO(hw), &vq->vq_queue_index, 2,
>   		VIRTIO_PCI_QUEUE_SEL);
> @@ -476,9 +467,6 @@ modern_setup_queue(struct virtio_hw *hw, struct virtqueue *vq)
>   	uint64_t desc_addr, avail_addr, used_addr;
>   	uint16_t notify_off;
>   
> -	if (!check_vq_phys_addr_ok(vq))
> -		return -1;
> -
>   	desc_addr = vq->vq_ring_mem;
>   	avail_addr = desc_addr + vq->vq_nentries * sizeof(struct vring_desc);
>   	used_addr = RTE_ALIGN_CEIL(avail_addr + offsetof(struct vring_avail,


^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] net/virtio: remove address width limit for modern devices
  2023-03-09 14:59 ` Maxime Coquelin
@ 2023-03-09 15:08   ` David Marchand
  2023-03-10  6:11     ` Pei, Andy
  0 siblings, 1 reply; 8+ messages in thread
From: David Marchand @ 2023-03-09 15:08 UTC (permalink / raw)
  To: Maxime Coquelin; +Cc: dev, andy.pei, Chenbo Xia

On Thu, Mar 9, 2023 at 3:59 PM Maxime Coquelin
<maxime.coquelin@redhat.com> wrote:
>
> Hi David,
>
> On 3/9/23 15:36, David Marchand wrote:
> > Modern devices don't have the same limitation as legacy devices, because
> > vring addresses are not configured using a 32-bit register.
> >
>
> Do we want to backport it? This is a bug in my opinion.

I wonder, this is the first time we see some report about this issue.
I'd like to first get more details from Andy who reported this issue,
like in which setup / condition this problem was caught.


-- 
David Marchand


^ permalink raw reply	[flat|nested] 8+ messages in thread

* RE: [PATCH] net/virtio: remove address width limit for modern devices
  2023-03-09 14:36 [PATCH] net/virtio: remove address width limit for modern devices David Marchand
  2023-03-09 14:59 ` Maxime Coquelin
@ 2023-03-10  6:10 ` Pei, Andy
  2023-03-10  8:07 ` Xia, Chenbo
  2023-03-14  8:53 ` [PATCH v2] " David Marchand
  3 siblings, 0 replies; 8+ messages in thread
From: Pei, Andy @ 2023-03-10  6:10 UTC (permalink / raw)
  To: David Marchand, dev; +Cc: Maxime Coquelin, Xia, Chenbo

HI 

> -----Original Message-----
> From: David Marchand <david.marchand@redhat.com>
> Sent: Thursday, March 9, 2023 10:36 PM
> To: dev@dpdk.org
> Cc: Pei, Andy <andy.pei@intel.com>; Maxime Coquelin
> <maxime.coquelin@redhat.com>; Xia, Chenbo <Chenbo.Xia@intel.com>
> Subject: [PATCH] net/virtio: remove address width limit for modern devices
> 
> Modern devices don't have the same limitation as legacy devices, because
> vring addresses are not configured using a 32-bit register.
> 
> Signed-off-by: David Marchand <david.marchand@redhat.com>
> ---
>  drivers/net/virtio/virtio_pci.c | 28 ++++++++--------------------
>  1 file changed, 8 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/net/virtio/virtio_pci.c b/drivers/net/virtio/virtio_pci.c
> index 9cf4d760b4..29eb739b04 100644
> --- a/drivers/net/virtio/virtio_pci.c
> +++ b/drivers/net/virtio/virtio_pci.c
> @@ -33,22 +33,6 @@
> 
>  struct virtio_pci_internal virtio_pci_internal[RTE_MAX_ETHPORTS];
> 
> -static inline int
> -check_vq_phys_addr_ok(struct virtqueue *vq) -{
> -	/* Virtio PCI device VIRTIO_PCI_QUEUE_PF register is 32bit,
> -	 * and only accepts 32 bit page frame number.
> -	 * Check if the allocated physical memory exceeds 16TB.
> -	 */
> -	if ((vq->vq_ring_mem + vq->vq_ring_size - 1) >>
> -			(VIRTIO_PCI_QUEUE_ADDR_SHIFT + 32)) {
> -		PMD_INIT_LOG(ERR, "vring address shouldn't be above
> 16TB!");
> -		return 0;
> -	}
> -
> -	return 1;
> -}
> -
>  #define PCI_MSIX_ENABLE 0x8000
> 
>  static enum virtio_msix_status
> @@ -273,8 +257,15 @@ legacy_setup_queue(struct virtio_hw *hw, struct
> virtqueue *vq)  {
>  	uint32_t src;
> 
> -	if (!check_vq_phys_addr_ok(vq))
> +	/* Virtio PCI device VIRTIO_PCI_QUEUE_PFN register is 32bit,
> +	 * and only accepts 32 bit page frame number.
> +	 * Check if the allocated physical memory exceeds 16TB.
> +	 */
> +	if ((vq->vq_ring_mem + vq->vq_ring_size - 1) >>
> +			(VIRTIO_PCI_QUEUE_ADDR_SHIFT + 32)) {
> +		PMD_INIT_LOG(ERR, "vring address shouldn't be above
> 16TB!");
>  		return -1;
> +	}
> 
>  	rte_pci_ioport_write(VTPCI_IO(hw), &vq->vq_queue_index, 2,
>  		VIRTIO_PCI_QUEUE_SEL);
> @@ -476,9 +467,6 @@ modern_setup_queue(struct virtio_hw *hw, struct
> virtqueue *vq)
>  	uint64_t desc_addr, avail_addr, used_addr;
>  	uint16_t notify_off;
> 
> -	if (!check_vq_phys_addr_ok(vq))
> -		return -1;
> -
>  	desc_addr = vq->vq_ring_mem;
>  	avail_addr = desc_addr + vq->vq_nentries * sizeof(struct vring_desc);
>  	used_addr = RTE_ALIGN_CEIL(avail_addr + offsetof(struct vring_avail,
> --
> 2.39.2
Acked-by: Andy Pei <andy.pei@intel.com>

^ permalink raw reply	[flat|nested] 8+ messages in thread

* RE: [PATCH] net/virtio: remove address width limit for modern devices
  2023-03-09 15:08   ` David Marchand
@ 2023-03-10  6:11     ` Pei, Andy
  0 siblings, 0 replies; 8+ messages in thread
From: Pei, Andy @ 2023-03-10  6:11 UTC (permalink / raw)
  To: David Marchand, Maxime Coquelin; +Cc: dev, Xia, Chenbo

Hi  David, 

The case is just want to enable ASAN to scan customer developed code.

> -----Original Message-----
> From: David Marchand <david.marchand@redhat.com>
> Sent: Thursday, March 9, 2023 11:08 PM
> To: Maxime Coquelin <maxime.coquelin@redhat.com>
> Cc: dev@dpdk.org; Pei, Andy <andy.pei@intel.com>; Xia, Chenbo
> <Chenbo.Xia@intel.com>
> Subject: Re: [PATCH] net/virtio: remove address width limit for modern
> devices
> 
> On Thu, Mar 9, 2023 at 3:59 PM Maxime Coquelin
> <maxime.coquelin@redhat.com> wrote:
> >
> > Hi David,
> >
> > On 3/9/23 15:36, David Marchand wrote:
> > > Modern devices don't have the same limitation as legacy devices,
> > > because vring addresses are not configured using a 32-bit register.
> > >
> >
> > Do we want to backport it? This is a bug in my opinion.
> 
> I wonder, this is the first time we see some report about this issue.
> I'd like to first get more details from Andy who reported this issue, like in
> which setup / condition this problem was caught.
> 
> 
> --
> David Marchand


^ permalink raw reply	[flat|nested] 8+ messages in thread

* RE: [PATCH] net/virtio: remove address width limit for modern devices
  2023-03-09 14:36 [PATCH] net/virtio: remove address width limit for modern devices David Marchand
  2023-03-09 14:59 ` Maxime Coquelin
  2023-03-10  6:10 ` Pei, Andy
@ 2023-03-10  8:07 ` Xia, Chenbo
  2023-03-14  8:53 ` [PATCH v2] " David Marchand
  3 siblings, 0 replies; 8+ messages in thread
From: Xia, Chenbo @ 2023-03-10  8:07 UTC (permalink / raw)
  To: David Marchand, dev; +Cc: Pei, Andy, Maxime Coquelin

> -----Original Message-----
> From: David Marchand <david.marchand@redhat.com>
> Sent: Thursday, March 9, 2023 10:36 PM
> To: dev@dpdk.org
> Cc: Pei, Andy <andy.pei@intel.com>; Maxime Coquelin
> <maxime.coquelin@redhat.com>; Xia, Chenbo <chenbo.xia@intel.com>
> Subject: [PATCH] net/virtio: remove address width limit for modern devices
> 
> Modern devices don't have the same limitation as legacy devices, because
> vring addresses are not configured using a 32-bit register.
> 
> Signed-off-by: David Marchand <david.marchand@redhat.com>
> ---
>  drivers/net/virtio/virtio_pci.c | 28 ++++++++--------------------
>  1 file changed, 8 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/net/virtio/virtio_pci.c
> b/drivers/net/virtio/virtio_pci.c
> index 9cf4d760b4..29eb739b04 100644
> --- a/drivers/net/virtio/virtio_pci.c
> +++ b/drivers/net/virtio/virtio_pci.c
> @@ -33,22 +33,6 @@
> 
>  struct virtio_pci_internal virtio_pci_internal[RTE_MAX_ETHPORTS];
> 
> -static inline int
> -check_vq_phys_addr_ok(struct virtqueue *vq)
> -{
> -	/* Virtio PCI device VIRTIO_PCI_QUEUE_PF register is 32bit,
> -	 * and only accepts 32 bit page frame number.
> -	 * Check if the allocated physical memory exceeds 16TB.
> -	 */
> -	if ((vq->vq_ring_mem + vq->vq_ring_size - 1) >>
> -			(VIRTIO_PCI_QUEUE_ADDR_SHIFT + 32)) {
> -		PMD_INIT_LOG(ERR, "vring address shouldn't be above 16TB!");
> -		return 0;
> -	}
> -
> -	return 1;
> -}
> -
>  #define PCI_MSIX_ENABLE 0x8000
> 
>  static enum virtio_msix_status
> @@ -273,8 +257,15 @@ legacy_setup_queue(struct virtio_hw *hw, struct
> virtqueue *vq)
>  {
>  	uint32_t src;
> 
> -	if (!check_vq_phys_addr_ok(vq))
> +	/* Virtio PCI device VIRTIO_PCI_QUEUE_PFN register is 32bit,
> +	 * and only accepts 32 bit page frame number.
> +	 * Check if the allocated physical memory exceeds 16TB.
> +	 */
> +	if ((vq->vq_ring_mem + vq->vq_ring_size - 1) >>
> +			(VIRTIO_PCI_QUEUE_ADDR_SHIFT + 32)) {
> +		PMD_INIT_LOG(ERR, "vring address shouldn't be above 16TB!");
>  		return -1;
> +	}
> 
>  	rte_pci_ioport_write(VTPCI_IO(hw), &vq->vq_queue_index, 2,
>  		VIRTIO_PCI_QUEUE_SEL);
> @@ -476,9 +467,6 @@ modern_setup_queue(struct virtio_hw *hw, struct
> virtqueue *vq)
>  	uint64_t desc_addr, avail_addr, used_addr;
>  	uint16_t notify_off;
> 
> -	if (!check_vq_phys_addr_ok(vq))
> -		return -1;
> -
>  	desc_addr = vq->vq_ring_mem;
>  	avail_addr = desc_addr + vq->vq_nentries * sizeof(struct vring_desc);
>  	used_addr = RTE_ALIGN_CEIL(avail_addr + offsetof(struct vring_avail,
> --
> 2.39.2

Agree that we should backport it.

Reviewed-by: Chenbo Xia <chenbo.xia@intel.com> 

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH v2] net/virtio: remove address width limit for modern devices
  2023-03-09 14:36 [PATCH] net/virtio: remove address width limit for modern devices David Marchand
                   ` (2 preceding siblings ...)
  2023-03-10  8:07 ` Xia, Chenbo
@ 2023-03-14  8:53 ` David Marchand
  2023-03-16 14:46   ` Maxime Coquelin
  3 siblings, 1 reply; 8+ messages in thread
From: David Marchand @ 2023-03-14  8:53 UTC (permalink / raw)
  To: dev
  Cc: stable, Maxime Coquelin, Andy Pei, Chenbo Xia, Yuanhan Liu,
	Huawei Xie, Tetsuya Mukawa

Modern devices don't have the same limitation as legacy devices, because
vring addresses are not configured using a 32-bit register.

Fixes: 6ba1f63b5ab0 ("virtio: support specification 1.0")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Acked-by: Andy Pei <andy.pei@intel.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
---
 drivers/net/virtio/virtio_pci.c | 28 ++++++++--------------------
 1 file changed, 8 insertions(+), 20 deletions(-)

diff --git a/drivers/net/virtio/virtio_pci.c b/drivers/net/virtio/virtio_pci.c
index 9cf4d760b4..29eb739b04 100644
--- a/drivers/net/virtio/virtio_pci.c
+++ b/drivers/net/virtio/virtio_pci.c
@@ -33,22 +33,6 @@
 
 struct virtio_pci_internal virtio_pci_internal[RTE_MAX_ETHPORTS];
 
-static inline int
-check_vq_phys_addr_ok(struct virtqueue *vq)
-{
-	/* Virtio PCI device VIRTIO_PCI_QUEUE_PF register is 32bit,
-	 * and only accepts 32 bit page frame number.
-	 * Check if the allocated physical memory exceeds 16TB.
-	 */
-	if ((vq->vq_ring_mem + vq->vq_ring_size - 1) >>
-			(VIRTIO_PCI_QUEUE_ADDR_SHIFT + 32)) {
-		PMD_INIT_LOG(ERR, "vring address shouldn't be above 16TB!");
-		return 0;
-	}
-
-	return 1;
-}
-
 #define PCI_MSIX_ENABLE 0x8000
 
 static enum virtio_msix_status
@@ -273,8 +257,15 @@ legacy_setup_queue(struct virtio_hw *hw, struct virtqueue *vq)
 {
 	uint32_t src;
 
-	if (!check_vq_phys_addr_ok(vq))
+	/* Virtio PCI device VIRTIO_PCI_QUEUE_PFN register is 32bit,
+	 * and only accepts 32 bit page frame number.
+	 * Check if the allocated physical memory exceeds 16TB.
+	 */
+	if ((vq->vq_ring_mem + vq->vq_ring_size - 1) >>
+			(VIRTIO_PCI_QUEUE_ADDR_SHIFT + 32)) {
+		PMD_INIT_LOG(ERR, "vring address shouldn't be above 16TB!");
 		return -1;
+	}
 
 	rte_pci_ioport_write(VTPCI_IO(hw), &vq->vq_queue_index, 2,
 		VIRTIO_PCI_QUEUE_SEL);
@@ -476,9 +467,6 @@ modern_setup_queue(struct virtio_hw *hw, struct virtqueue *vq)
 	uint64_t desc_addr, avail_addr, used_addr;
 	uint16_t notify_off;
 
-	if (!check_vq_phys_addr_ok(vq))
-		return -1;
-
 	desc_addr = vq->vq_ring_mem;
 	avail_addr = desc_addr + vq->vq_nentries * sizeof(struct vring_desc);
 	used_addr = RTE_ALIGN_CEIL(avail_addr + offsetof(struct vring_avail,
-- 
2.39.2


^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v2] net/virtio: remove address width limit for modern devices
  2023-03-14  8:53 ` [PATCH v2] " David Marchand
@ 2023-03-16 14:46   ` Maxime Coquelin
  0 siblings, 0 replies; 8+ messages in thread
From: Maxime Coquelin @ 2023-03-16 14:46 UTC (permalink / raw)
  To: David Marchand, dev
  Cc: stable, Andy Pei, Chenbo Xia, Yuanhan Liu, Huawei Xie, Tetsuya Mukawa



On 3/14/23 09:53, David Marchand wrote:
> Modern devices don't have the same limitation as legacy devices, because
> vring addresses are not configured using a 32-bit register.
> 
> Fixes: 6ba1f63b5ab0 ("virtio: support specification 1.0")
> Cc: stable@dpdk.org
> 
> Signed-off-by: David Marchand <david.marchand@redhat.com>
> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
> Acked-by: Andy Pei <andy.pei@intel.com>
> Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
> ---
>   drivers/net/virtio/virtio_pci.c | 28 ++++++++--------------------
>   1 file changed, 8 insertions(+), 20 deletions(-)
> 

Applied to dpdk-next-virtio/main.

Thanks,
Maxime


^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2023-03-16 14:46 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-03-09 14:36 [PATCH] net/virtio: remove address width limit for modern devices David Marchand
2023-03-09 14:59 ` Maxime Coquelin
2023-03-09 15:08   ` David Marchand
2023-03-10  6:11     ` Pei, Andy
2023-03-10  6:10 ` Pei, Andy
2023-03-10  8:07 ` Xia, Chenbo
2023-03-14  8:53 ` [PATCH v2] " David Marchand
2023-03-16 14:46   ` Maxime Coquelin

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