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Thu, 8 Oct 2020 16:05:47 +0000 Received: from DM6PR11MB2555.namprd11.prod.outlook.com ([fe80::78d4:d670:95af:773d]) by DM6PR11MB2555.namprd11.prod.outlook.com ([fe80::78d4:d670:95af:773d%5]) with mapi id 15.20.3433.043; Thu, 8 Oct 2020 16:05:46 +0000 From: "Power, Ciara" To: "Ananyev, Konstantin" , "dev@dpdk.org" CC: "Xing, Beilei" , "Guo, Jia" , "Richardson, Bruce" Thread-Topic: [dpdk-dev] [PATCH v3 04/18] net/i40e: add checks for max SIMD bitwidth Thread-Index: AQHWnYbFKHFUUeg6hU6tm3cntXT8Y6mN3UTw Date: Thu, 8 Oct 2020 16:05:46 +0000 Message-ID: References: <20200807155859.63888-1-ciara.power@intel.com> <20200930130415.11211-1-ciara.power@intel.com> <20200930130415.11211-5-ciara.power@intel.com> In-Reply-To: Accept-Language: en-IE, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-version: 11.5.1.3 dlp-product: dlpe-windows dlp-reaction: no-action authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=intel.com; 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DIR:OUT; SFP:1102; x-ms-exchange-antispam-messagedata: TUayDR5lMi/45stF8uN8B+kSzleTdenLnPXDH2npKUbnuyWr5CvxNKGZMp/tYnCm1mnSujEEbuK68FefAtvQoExXC+Ws/9/J1dHoYVsLGCQ+2wRewZY2uQg7GwMDqITvOS+GwHsfsIj68mfCVPTSuYFFV2sTPDKojhWKWIAnd6P7we5yIdlv08UOuB9Y6d2rF7lJ+0egp11DLpJdBa+7xYiW11zYErqSyZbx4Fz4UNt510lAI4PQIVlJsE22q4jCJpWiy2Pz7eAYb3DvOy/EVZZzNDp7GlbafeMolSqRGGG2Je28eLLCC9O8OfaE6Tpf+jlXXE4NvF9EV7+vNknmQvuyOVaco0rcIsyUfXxFVgir6y7auuKonJHWx52LrpzIigdX5HQHAL7Ihmm9s7AADfDPGjFHqp1vFymkf3dquaJhSeSMYTYCnOkemOmUOWxJb6f7Df+M6PKdBBiMkCx8e2vOYBnhHxNLFCxCuWop9JIPFFMKP9qKnFXxD5a6GyV5KIID8yhu68dRETXgRXUOfoc7Hly07rAawDhiA1/jQnxAWkyrIBaRBCT2Hk8UyOVblgCtKCJANqTGrwzHCA/tvGR2rtwZq7jl/rQNW7SgWZbkpC34Xk6Ou7VLvxw4FKGt+58oQTRrsy8py7LTdkT0MQ== Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR11MB2555.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: fe6e25dc-d0f5-4b3e-f1b9-08d86ba4043c X-MS-Exchange-CrossTenant-originalarrivaltime: 08 Oct 2020 16:05:46.0647 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: xVEURzEmsu2Zw97oSq6+RXN5UPXM0Vmvj3yk5rlVSI7GtkRnz3x6P9bhxCnauuzKgNUjcPBDi9qcNGj2aQ6yGQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR11MB3930 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH v3 04/18] net/i40e: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Konstantin, =20 >-----Original Message----- >From: Ananyev, Konstantin >Sent: Thursday 8 October 2020 16:22 >To: Power, Ciara ; dev@dpdk.org >Cc: Power, Ciara ; Xing, Beilei >; Guo, Jia >Subject: RE: [dpdk-dev] [PATCH v3 04/18] net/i40e: add checks for max SIMD >bitwidth > > >> >> When choosing a vector path to take, an extra condition must be >> satisfied to ensure the max SIMD bitwidth allows for the CPU enabled >> path. >> >> Cc: Beilei Xing >> Cc: Jeff Guo >> >> Signed-off-by: Ciara Power >> --- >> drivers/net/i40e/i40e_rxtx.c | 19 +++++++++++++------ >> 1 file changed, 13 insertions(+), 6 deletions(-) >> >> diff --git a/drivers/net/i40e/i40e_rxtx.c >> b/drivers/net/i40e/i40e_rxtx.c index 60b33d20a1..9b535b52fa 100644 >> --- a/drivers/net/i40e/i40e_rxtx.c >> +++ b/drivers/net/i40e/i40e_rxtx.c >> @@ -3098,7 +3098,8 @@ static eth_rx_burst_t >> i40e_get_latest_rx_vec(bool scatter) { #if defined(RTE_ARCH_X86) && >> defined(CC_AVX2_SUPPORT) >> - if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2)) >> + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) && >> + rte_get_max_simd_bitwidth() >=3D >RTE_MAX_256_SIMD) >> return scatter ? i40e_recv_scattered_pkts_vec_avx2 : >> i40e_recv_pkts_vec_avx2; > >Hmm, but that means - if user will set --simd-bitwidth=3D128 we'll select >scalar function, right? >Even though sse one is available. >Is that what we really want in that case? > If the max SIMD is 128, the second return in this function is used, which I= believe is SSE: return scatter ? i40e_recv_scattered_pkts_vec : i40e_recv_pkts_vec; And that function is only called if the max SIMD is >=3D128, scalar is used= otherwise. Am I missing something else here? Thanks, Ciara=20 >> #endif >> @@ -3115,7 +3116,8 @@ i40e_get_recommend_rx_vec(bool scatter) >> * use of AVX2 version to later plaforms, not all those that could >> * theoretically run it. >> */ >> - if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F)) >> + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) && >> + rte_get_max_simd_bitwidth() >=3D >RTE_MAX_256_SIMD) >> return scatter ? i40e_recv_scattered_pkts_vec_avx2 : >> i40e_recv_pkts_vec_avx2; >> #endif >> @@ -3154,7 +3156,8 @@ i40e_set_rx_function(struct rte_eth_dev *dev) >> } >> } >> >> - if (ad->rx_vec_allowed) { >> + if (ad->rx_vec_allowed && rte_get_max_simd_bitwidth() >> + >=3D RTE_MAX_128_SIMD) { >> /* Vec Rx path */ >> PMD_INIT_LOG(DEBUG, "Vector Rx path will be used on >port=3D%d.", >> dev->data->port_id); >> @@ -3268,7 +3271,8 @@ static eth_tx_burst_t >> i40e_get_latest_tx_vec(void) >> { >> #if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT) >> - if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2)) >> + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) && >> + rte_get_max_simd_bitwidth() >=3D >RTE_MAX_256_SIMD) >> return i40e_xmit_pkts_vec_avx2; >> #endif >> return i40e_xmit_pkts_vec; >> @@ -3283,7 +3287,8 @@ i40e_get_recommend_tx_vec(void) >> * use of AVX2 version to later plaforms, not all those that could >> * theoretically run it. >> */ >> - if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F)) >> + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) && >> + rte_get_max_simd_bitwidth() >=3D >RTE_MAX_256_SIMD) >> return i40e_xmit_pkts_vec_avx2; >> #endif >> return i40e_xmit_pkts_vec; >> @@ -3311,7 +3316,9 @@ i40e_set_tx_function(struct rte_eth_dev *dev) >> } >> >> if (ad->tx_simple_allowed) { >> - if (ad->tx_vec_allowed) { >> + if (ad->tx_vec_allowed && >> + rte_get_max_simd_bitwidth() >> + >=3D RTE_MAX_128_SIMD) { >> PMD_INIT_LOG(DEBUG, "Vector tx finally be used."); >> if (ad->use_latest_vec) >> dev->tx_pkt_burst =3D >> -- >> 2.17.1