Updated with meeting and presentation.

This meeting is a follow-up to the previous calls in March and the discussion which has happened since on the DPDK and OVS mailing lists.

Three approaches were presented in the previous calls:

*       "Defer work": Handle DMA completions at OVS PMD thread level
*       "v3": Handle DMA Tx completions from Rx context.
*       "v3 + lockless ring": Handle DMA Tx completions from Rx context + lockless ring to avoid contention.

After these calls, the discussion continued on the DPDK and OVS mailing lists, where an alternate approach has been proposed.

The newly-suggested approach:

*       "DMA VirtQ Completions": Add an additional transaction(s) to each burst of DMA copies; a special transaction containing the memory write operation that makes the descriptors available to the Virtio driver. Also separate the actual kick of the guest with the data transfer.

Agenda for call 26th April:

*       Intel team will present slides to help understand the differences in architecture/designs.
*       Discuss the strengths/weaknesses/feasibility of the "DMA VirtQ Completions" approach, comparing to current best-candidate "Defer Work".
*       Work toward single-solution to be accepted upstream in DPDK and OVS

Slides: https://github.com/Sunil-Pai-G/OVS-DPDK-presentation-share/blob/main/ovs_datapath_design_2022%20session%203.pdf

Google Meet: https://meet.google.com/hme-pygf-bfb