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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR11MB3530.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 15e09135-642b-4794-0c0c-08da482f7ffe X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Jun 2022 02:43:27.3739 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: /IFFWRg0zZBcm9rBzgNaZcJXtpi723yx2qSM2SUJS00JxEwAQBfqoiJKtgjdo87DibKqvDdGIy7dCJkjZzXwBw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR11MB5970 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: Zhang, Tianfei > Sent: Monday, June 6, 2022 14:37 > To: Huang, Wei ; dev@dpdk.org; > thomas@monjalon.net; nipun.gupta@nxp.com; hemant.agrawal@nxp.com > Cc: stable@dpdk.org; Xu, Rosen ; Zhang, Qi Z > > Subject: RE: [PATCH v5 4/5] raw/afu_mf: add HE-MEM AFU driver >=20 >=20 >=20 > > -----Original Message----- > > From: Huang, Wei > > Sent: Friday, May 27, 2022 1:37 PM > > To: dev@dpdk.org; thomas@monjalon.net; nipun.gupta@nxp.com; > > hemant.agrawal@nxp.com > > Cc: stable@dpdk.org; Xu, Rosen ; Zhang, Tianfei > > ; Zhang, Qi Z ; Huang, > > Wei > > Subject: [PATCH v5 4/5] raw/afu_mf: add HE-MEM AFU driver > > > > HE-MEM is one of the host exerciser modules in OFS FPGA, which is used > > to test local memory with built-in traffic generator. > > This driver initialize the module and report test result. > > > > Signed-off-by: Wei Huang > > --- > > drivers/raw/afu_mf/afu_mf_rawdev.c | 3 + > > drivers/raw/afu_mf/he_mem.c | 181 > > +++++++++++++++++++++++++++++++++++++ > > drivers/raw/afu_mf/he_mem.h | 40 ++++++++ > > drivers/raw/afu_mf/meson.build | 2 +- > > drivers/raw/afu_mf/rte_pmd_afu.h | 7 ++ > > 5 files changed, 232 insertions(+), 1 deletion(-) create mode 100644 > > drivers/raw/afu_mf/he_mem.c create mode 100644 > > drivers/raw/afu_mf/he_mem.h > > > > diff --git a/drivers/raw/afu_mf/afu_mf_rawdev.c > > b/drivers/raw/afu_mf/afu_mf_rawdev.c > > index e91eb21..a56f60e 100644 > > --- a/drivers/raw/afu_mf/afu_mf_rawdev.c > > +++ b/drivers/raw/afu_mf/afu_mf_rawdev.c > > @@ -21,6 +21,7 @@ > > #include "afu_mf_rawdev.h" > > #include "n3000_afu.h" > > #include "he_lbk.h" > > +#include "he_mem.h" > > > > #define AFU_MF_PMD_RAWDEV_NAME rawdev_afu_mf > > > > @@ -28,6 +29,7 @@ > > { N3000_AFU_UUID_L, N3000_AFU_UUID_H }, > > { HE_LBK_UUID_L, HE_LBK_UUID_H }, > > { HE_MEM_LBK_UUID_L, HE_MEM_LBK_UUID_H }, > > + { HE_MEM_TG_UUID_L, HE_MEM_TG_UUID_H }, > > { 0, 0 /* sentinel */ } > > }; > > > > @@ -35,6 +37,7 @@ > > &n3000_afu_drv, > > &he_lbk_drv, > > &he_mem_lbk_drv, > > + &he_mem_tg_drv, > > NULL > > }; > > > > diff --git a/drivers/raw/afu_mf/he_mem.c > b/drivers/raw/afu_mf/he_mem.c > > new file mode 100644 index 0000000..ccbb3a8 > > --- /dev/null > > +++ b/drivers/raw/afu_mf/he_mem.c > > @@ -0,0 +1,181 @@ > > +/* SPDX-License-Identifier: BSD-3-Clause > > + * Copyright(c) 2022 Intel Corporation */ > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +#include "afu_mf_rawdev.h" > > +#include "he_mem.h" > > + > > +static int he_mem_tg_test(struct afu_mf_rawdev *dev) { > > + struct he_mem_tg_priv *priv =3D NULL; > > + struct rte_pmd_afu_he_mem_tg_cfg *cfg =3D NULL; > > + struct he_mem_tg_ctx *ctx =3D NULL; > > + uint64_t value =3D 0x12345678; > > + uint64_t cap =3D 0; > > + uint64_t channel_mask =3D 0; > > + int i, t =3D 0; > > + > > + if (!dev) > > + return -EINVAL; > > + > > + priv =3D (struct he_mem_tg_priv *)dev->priv; > > + if (!priv) > > + return -ENOENT; > > + > > + cfg =3D &priv->he_mem_tg_cfg; > > + ctx =3D &priv->he_mem_tg_ctx; > > + > > + AFU_MF_PMD_DEBUG("Channel mask: 0x%x", cfg->channel_mask); > > + > > + rte_write64(value, ctx->addr + MEM_TG_SCRATCHPAD); > > + cap =3D rte_read64(ctx->addr + MEM_TG_SCRATCHPAD); > > + AFU_MF_PMD_DEBUG("Scratchpad value: 0x%"PRIx64, cap); > > + if (cap !=3D value) { > > + AFU_MF_PMD_ERR("Test scratchpad register failed"); > > + return -EIO; > > + } > > + > > + cap =3D rte_read64(ctx->addr + MEM_TG_CTRL); > > + AFU_MF_PMD_DEBUG("Capability: 0x%"PRIx64, cap); > > + > > + channel_mask =3D cfg->channel_mask & cap; > > + /* start traffic generators */ > > + rte_write64(channel_mask, ctx->addr + MEM_TG_CTRL); > > + > > + /* check test status */ > > + while (t < MEM_TG_TIMEOUT_MS) { > > + value =3D rte_read64(ctx->addr + MEM_TG_STAT); > > + for (i =3D 0; i < NUM_MEM_TG_CHANNELS; i++) { > > + if (channel_mask & (1 << i)) { > > + if (TGACTIVE(value, i)) > > + continue; > > + printf("TG channel %d test %s\n", i, > > + TGPASS(value, i) ? "pass" : > > + TGTIMEOUT(value, i) ? "timeout" : > > + TGFAIL(value, i) ? "fail" : "error"); > > + channel_mask &=3D ~(1 << i); > > + } > > + } > > + if (!channel_mask) > > + break; > > + rte_delay_ms(MEM_TG_POLL_INTERVAL_MS); > > + t +=3D MEM_TG_POLL_INTERVAL_MS; > > + } > > + > > + if (channel_mask) { > > + AFU_MF_PMD_ERR("Timeout 0x%04lx", (unsigned > long)value); > > + return channel_mask; > > + } > > + > > + return 0; > > +} > > + > > +static int he_mem_tg_init(struct afu_mf_rawdev *dev) { > > + struct he_mem_tg_priv *priv =3D NULL; > > + struct he_mem_tg_ctx *ctx =3D NULL; > > + > > + if (!dev) > > + return -EINVAL; > > + > > + priv =3D (struct he_mem_tg_priv *)dev->priv; > > + if (!priv) { > > + priv =3D rte_zmalloc(NULL, sizeof(struct he_mem_tg_priv), 0); > > + if (!priv) > > + return -ENOMEM; > > + dev->priv =3D priv; > > + } > > + > > + ctx =3D &priv->he_mem_tg_ctx; > > + ctx->addr =3D (uint8_t *)dev->addr; > > + > > + return 0; > > +} > > + > > +static int he_mem_tg_config(struct afu_mf_rawdev *dev, void *config, > > + size_t config_size) > > +{ > > + struct he_mem_tg_priv *priv =3D NULL; > > + > > + if (!dev || !config || !config_size) > > + return -EINVAL; > > + > > + priv =3D (struct he_mem_tg_priv *)dev->priv; > > + if (!priv) > > + return -ENOENT; > > + > > + if (config_size !=3D sizeof(struct rte_pmd_afu_he_mem_tg_cfg)) > > + return -EINVAL; > > + > > + rte_memcpy(&priv->he_mem_tg_cfg, config, sizeof(priv- > > >he_mem_tg_cfg)); > > + > > + return 0; > > +} > > + > > +static int he_mem_tg_close(struct afu_mf_rawdev *dev) { > > + if (!dev) > > + return -EINVAL; > > + > > + rte_free(dev->priv); > > + dev->priv =3D NULL; > > + > > + return 0; > > +} > > + > > +static int he_mem_tg_dump(struct afu_mf_rawdev *dev, FILE *f) { > > + struct he_mem_tg_priv *priv =3D NULL; > > + struct he_mem_tg_ctx *ctx =3D NULL; > > + > > + if (!dev) > > + return -EINVAL; > > + > > + priv =3D (struct he_mem_tg_priv *)dev->priv; > > + if (!priv) > > + return -ENOENT; > > + > > + if (!f) > > + f =3D stdout; > > + > > + ctx =3D &priv->he_mem_tg_ctx; > > + > > + fprintf(f, "addr:\t\t%p\n", (void *)ctx->addr); > > + > > + return 0; > > +} > > + > > +static struct afu_mf_ops he_mem_tg_ops =3D { > > + .init =3D he_mem_tg_init, > > + .config =3D he_mem_tg_config, > > + .start =3D NULL, > > + .stop =3D NULL, > > + .test =3D he_mem_tg_test, > > + .close =3D he_mem_tg_close, > > + .dump =3D he_mem_tg_dump, > > + .reset =3D NULL > > +}; > > + > > +struct afu_mf_drv he_mem_tg_drv =3D { > > + .uuid =3D { HE_MEM_TG_UUID_L, HE_MEM_TG_UUID_H }, > > + .ops =3D &he_mem_tg_ops > > +}; > > diff --git a/drivers/raw/afu_mf/he_mem.h > b/drivers/raw/afu_mf/he_mem.h > > new file mode 100644 index 0000000..82404b6 > > --- /dev/null > > +++ b/drivers/raw/afu_mf/he_mem.h > > @@ -0,0 +1,40 @@ > > +/* SPDX-License-Identifier: BSD-3-Clause > > + * Copyright(c) 2022 Intel Corporation */ > > + > > +#ifndef _HE_MEM_H_ > > +#define _HE_MEM_H_ > > + > > +#include "afu_mf_rawdev.h" > > +#include "rte_pmd_afu.h" > > + > > +#define HE_MEM_TG_UUID_L 0xa3dc5b831f5cecbb #define > > HE_MEM_TG_UUID_H > > +0x4dadea342c7848cb > > + > > +#define NUM_MEM_TG_CHANNELS 4 > > +#define MEM_TG_TIMEOUT_MS 5000 > > +#define MEM_TG_POLL_INTERVAL_MS 10 > > + > > +extern struct afu_mf_drv he_mem_tg_drv; > > + > > +/* MEM-TG registers definition */ > > +#define MEM_TG_SCRATCHPAD 0x28 > > +#define MEM_TG_CTRL 0x30 > > +#define TGCONTROL(n) (1 << (n)) > > +#define MEM_TG_STAT 0x38 > > +#define TGSTATUS(v, n) (((v) >> (n << 2)) & 0xf) > > +#define TGPASS(v, n) (((v) >> ((n << 2) + 3)) & 0x1) > > +#define TGFAIL(v, n) (((v) >> ((n << 2) + 2)) & 0x1) > > +#define TGTIMEOUT(v, n) (((v) >> ((n << 2) + 1)) & 0x1) > > +#define TGACTIVE(v, n) (((v) >> (n << 2)) & 0x1) > > + > > +struct he_mem_tg_ctx { > > + uint8_t *addr; > > +}; > > + > > +struct he_mem_tg_priv { > > + struct rte_pmd_afu_he_mem_tg_cfg he_mem_tg_cfg; > > + struct he_mem_tg_ctx he_mem_tg_ctx; > > +}; > > + > > +#endif /* _HE_MEM_H_ */ > > diff --git a/drivers/raw/afu_mf/meson.build > > b/drivers/raw/afu_mf/meson.build index a983f53..b53a31b 100644 > > --- a/drivers/raw/afu_mf/meson.build > > +++ b/drivers/raw/afu_mf/meson.build > > @@ -2,6 +2,6 @@ > > # Copyright 2022 Intel Corporation > > > > deps +=3D ['rawdev', 'bus_pci', 'bus_ifpga'] -sources =3D > > files('afu_mf_rawdev.c', 'n3000_afu.c', 'he_lbk.c') > > +sources =3D files('afu_mf_rawdev.c', 'n3000_afu.c', 'he_lbk.c', > > +'he_mem.c') > > > > headers =3D files('rte_pmd_afu.h') > > diff --git a/drivers/raw/afu_mf/rte_pmd_afu.h > > b/drivers/raw/afu_mf/rte_pmd_afu.h > > index 658df55..2f92f7e 100644 > > --- a/drivers/raw/afu_mf/rte_pmd_afu.h > > +++ b/drivers/raw/afu_mf/rte_pmd_afu.h > > @@ -104,6 +104,13 @@ struct rte_pmd_afu_he_lbk_cfg { > > uint32_t freq_mhz; > > }; > > > > +/** > > + * HE-MEM-TG AFU configuration data structure. > > + */ > > +struct rte_pmd_afu_he_mem_tg_cfg { > > + uint32_t channel_mask; /* mask of traffic generator channel */ > > +}; > > + > > #ifdef __cplusplus > > } > > #endif >=20 > The file name change to "afu_pmd_he_mem.c" is better? agree > Other part is good for me, you can add: > Acked-by: Tianfei Zhang >=20 > > -- > > 1.8.3.1