From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7FC7CA0547; Wed, 29 Sep 2021 03:34:06 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id F1E634068F; Wed, 29 Sep 2021 03:34:05 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id 6CA3C4068E; Wed, 29 Sep 2021 03:34:03 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10121"; a="212092102" X-IronPort-AV: E=Sophos;i="5.85,331,1624345200"; d="scan'208";a="212092102" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2021 18:34:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.85,331,1624345200"; d="scan'208";a="486748960" Received: from orsmsx604.amr.corp.intel.com ([10.22.229.17]) by orsmga008.jf.intel.com with ESMTP; 28 Sep 2021 18:34:02 -0700 Received: from orsmsx606.amr.corp.intel.com (10.22.229.19) by ORSMSX604.amr.corp.intel.com (10.22.229.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.12; Tue, 28 Sep 2021 18:34:01 -0700 Received: from ORSEDG602.ED.cps.intel.com (10.7.248.7) by orsmsx606.amr.corp.intel.com (10.22.229.19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.12 via Frontend Transport; Tue, 28 Sep 2021 18:34:01 -0700 Received: from NAM12-MW2-obe.outbound.protection.outlook.com (104.47.66.49) by edgegateway.intel.com (134.134.137.103) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2242.12; Tue, 28 Sep 2021 18:34:00 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=ZNrRbQBErrKUb5ip1J6AiLdiCr06hSy6cyAmRzbphGvWsh6A6YEs8GP+460HFCfwbUS2vOko++gh93bE4hJrHyx4DweFLCV9axbAzspZDKRNtzmeja6qrXpGzKUwbIPLOCWecHN13ngMBpxmkIIDy59SqLLQAE/ctRBKEToBR9qN2ZkkwKZsMbioRgOWFp+Mrl44AOknT9EiTZ68bAIo1hLebDUVH+taQt7EuZNGqOR0Zs95G/GVrOH7yM3fDe7dnwqURH5K6tyVBcAiBt9mSMX4jxc+Gzd2GcqDgK8IWqeVcUXjA5arRngcb2e7m2MQ6tOsMcwmqnZRAs85fx7Xeg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=12sYVLAtLPtMDapsdxKvEGKzXqwStw475PFlCKFBP7E=; b=DHc7F6srCkPCklUyWudGh1eFhucBW0KhIFd8INERW09OwIdipUCcjF4DzGACv119dGT8+ln5QXPWZSVdk6XrNGsRU4X/41wGvTi+Cks2bnYg2m8O3htxT59miPLOeTlGkWI18cVTkM07Kf0V9yQT0mUBVYigy8gK7v7QgjAVgWxRBt7Sx+Y79vbi0ZKEG8XRbpAu5TOFtUEwl6V4qvo+EJkMEV+M27Df39QzQp/qCWi0EhD//qQcjgY20IqtXPX29rX/zf+sjMs+To8Sk1pTWRlfGVNdZa18atytjda/G6xmsBFsWMFfdXnQsBvF+mP7KcGopI56zRGxWoAtpnBuRw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=intel.onmicrosoft.com; s=selector2-intel-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=12sYVLAtLPtMDapsdxKvEGKzXqwStw475PFlCKFBP7E=; b=cDX9FcvMFvYXRmRTq2BEHEvDJGf3v/PJbhlBBRgMFdS4JTQiw15J8vuV7jOxJiS+j3VsF/yupb9pPtsNARY05ZKgNx7bt2gxhimz3QmbFneQW/k/kqCW6RnbpueR3rc/f9+WB9UUg288RDh6RjtreJxP75RLtDmZBdERMMt3xUs= Received: from DM6PR11MB3898.namprd11.prod.outlook.com (2603:10b6:5:19f::12) by DM5PR11MB1626.namprd11.prod.outlook.com (2603:10b6:4:9::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4544.15; Wed, 29 Sep 2021 01:33:58 +0000 Received: from DM6PR11MB3898.namprd11.prod.outlook.com ([fe80::4ca9:17cf:64c4:ca73]) by DM6PR11MB3898.namprd11.prod.outlook.com ([fe80::4ca9:17cf:64c4:ca73%4]) with mapi id 15.20.4544.021; Wed, 29 Sep 2021 01:33:58 +0000 From: "Zhang, AlvinX" To: "Zhang, Qi Z" , "Xing, Beilei" , "Guo, Junfeng" , "ktraynor@redhat.com" CC: "dev@dpdk.org" , "stable@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH v2] net/i40e: fix Rx packet statistics Thread-Index: AQHXtBgecYcDqoVJMUG9wjgXLl11bKu5THSAgADvMBA= Date: Wed, 29 Sep 2021 01:33:58 +0000 Message-ID: References: <20210926075757.15116-1-alvinx.zhang@intel.com> <20210928032239.17756-1-alvinx.zhang@intel.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=intel.com; x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 972d3838-c325-463e-8752-08d982e93598 x-ms-traffictypediagnostic: DM5PR11MB1626: x-ld-processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:6430; x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: jxNverYEkOgWST7Z6+1Dnfl22Pgy0HiTPHpn2iv8j6Ut9frB6Lm1C/mxudDmgnZ/XqofekWtDzkXrJr4jADRecR7caIgf06rvs+alwe8kZqU1VJj9DxOfFkZxHiJHptYIFl3O27pMmiRBf81kWlU1jim7zG3aq1bEFtERvd7fuDwNXYN+A/lgZSRjapcb1guQ+nkpY8YYpBdNJetNMu+SiNzjSUzMHGMcXYQBku5/1B5WWCM/Cu/E6B+R05J5aRHzSWgGx0ldyvCGeefPj2q/pjoUn0251Ij/ht7X2ooCAW/Kah3yM/5ciA28VZKTkAfq0u46bclaQE7Hx2ZWKbq8U9oA0gZ9NBjkj/1THgokYwrd2E2L3Yy4Alw6IkrKEF14K7mu0SEVZXDNyVwVuG+GruamK0gz9MKWuOLSgHY65fz0Pyqe7lEWksWjNhIWcGCZokUGKQPCq+dZHSAl8LRGIRMgXvCBxOMsGXB+DCXj1Fw0NxJIkgACqxkBVibd1ZQUl+m7lvtdF1LjcJiOZ7rMptS3WT4UPuQIJrx/M4D5SF0ClWXUGpNCTkpDTZiuNiokswV/aZUCLUM8qdQG8uobNkt9RDeVoK8fbXzZKRCZJQ5M9tcTFtCSojCgsZkLs4xsi1cHteDU0SARj3WZngd0hfTTgCfcUUslY00EgzzkYQdkWcO6URSGNoVAdVc8et1bSdrm5vFzKOiXUPW9JyQZQ== x-forefront-antispam-report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DM6PR11MB3898.namprd11.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(54906003)(110136005)(9686003)(8676002)(8936002)(71200400001)(76116006)(55016002)(86362001)(316002)(33656002)(7696005)(508600001)(52536014)(38100700002)(122000001)(186003)(53546011)(6506007)(64756008)(66556008)(66476007)(66446008)(2906002)(26005)(83380400001)(66946007)(5660300002)(38070700005)(4326008); DIR:OUT; SFP:1102; x-ms-exchange-antispam-messagedata-chunkcount: 1 x-ms-exchange-antispam-messagedata-0: =?us-ascii?Q?Cq8ZqNBwXG1fI/M4jck1pU9NiSA9ny+Yx23O3yPwmrjvKbuVjTCwrByvQ0nX?= =?us-ascii?Q?1Yzr2ZbVRDgjivqNPhfb8G84IczEAFwGv79YMhwsnXgURED269yakN0LMLCC?= =?us-ascii?Q?HnUZuDtKqhz+/OAHmql8OzvKuDeQDg7/w2c+iZiS7BeuCx+iSJpM6O0x8FqX?= =?us-ascii?Q?C0e0Ic0X6kaCSVu/vjJTuZHJo4jgr470LC6JV6xJeiEXdq/EzIExG9mChT3i?= =?us-ascii?Q?dKW/QcIXDEeOZDO0WfCIl4KtrTDMC+YAyPHAV+T+iTv8fjgR7vOS4SAmMnkc?= =?us-ascii?Q?XJVzLYdpgrUbHihY6UhanGRbk0HE/mpw2pl5NVzkl4FTl2A6vKiJX4UJKrAb?= =?us-ascii?Q?TMuBohFF2uZVWtKh+1qN0eizH65zr/vnmba8Q27VJWw8bq3P4DrKQFjph/+W?= =?us-ascii?Q?zXFY3z02psZJhB01KRh+7Ho9nHqyE9yNxUVrnijLYWyWOZqE4Dsl4oo+7fsg?= =?us-ascii?Q?I2VaegPckkVtcqfwuifZiLSyJ2KD15lO+0g/33rILfKeQxgqNqTVfbIzP83V?= =?us-ascii?Q?bQ2OzumxxgFKdT1Ccrk1bJq08qAPrQ6qLLnfe0aQZKACjtWYy3wMHbnSkPJf?= =?us-ascii?Q?O1G1TpRiVTdODdF5f1csV2MQD2V5Ug0OzSCpdr9lc1Jg7lbcucgkh4toVW7/?= =?us-ascii?Q?qfTgHoMhK5Ukh+C5V+bIc/7zvqC9U2NO7o5sPHZdzZZ76+oT5UXIbTDKnxLO?= =?us-ascii?Q?e8sy0fWfCOnLxuGbWZJZULdX+AOIztnDn5vsdEqzvhVb727fNtOM9t4qWsyb?= =?us-ascii?Q?h5qQWaV7Sf3ry3YFAy9D4jI64oKSofOVEEzBeVu74j3j40X9IPdhDWU+DjEz?= =?us-ascii?Q?1q0PV92n6GBUjqg+KMLGGIkhmJeec06XEVCsmksH0Zp3VUgZKd0lVk9Fa+8C?= =?us-ascii?Q?xineyuUu62kNSqCuTCsmGUAQmipMaqWXs5Ud/Khw7RqA1vMunLQ8mSMKsvdh?= =?us-ascii?Q?Z105qTQEoWZAHDbRM2SgDPafI2oHjwOcZFFnD7zAGSrf6bOb/78GGToKO4pL?= =?us-ascii?Q?M4ZsVYQpbdkZn8SxF7aiS34hE6Apc+6MIkhb/AsXGJllG6wxGWadGlM52reU?= =?us-ascii?Q?pd3g3cQyybPwcfjX9v9QAoLwxsF4tsPtdafftJMICsMsGfP7FcMCQIxSxACL?= =?us-ascii?Q?yXOhkw+KfySLJkPBx/Z/4BXg0s1Siw5Ip7imOh5NBe0Ahu7nIpzvkujDfbp1?= =?us-ascii?Q?o+YP1es4ahXSQc/zuR7zszTmBaWiuQ1RN6LZz/8O9L5docMd7EOTcUDgzT7c?= =?us-ascii?Q?/yumFH1dCgmHuLydOEzvK2mH4vk0cyId2dBfj3lHYBky+/zo3LROiDvUtJ+c?= =?us-ascii?Q?JLKusDQ29xFllN9yxLK14U8b?= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR11MB3898.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 972d3838-c325-463e-8752-08d982e93598 X-MS-Exchange-CrossTenant-originalarrivaltime: 29 Sep 2021 01:33:58.7265 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: EPqUSbUeIfLdCymFGOikb4sjxQPDvIEclPIlqu8wbpVKpyo2MZUoKQ71j+0UzapZzcgAC4bJeB0uXctxbWirOw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR11MB1626 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH v2] net/i40e: fix Rx packet statistics X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Zhang, Qi Z > Sent: Tuesday, September 28, 2021 7:17 PM > To: Zhang, AlvinX ; Xing, Beilei > ; Guo, Junfeng ; > ktraynor@redhat.com > Cc: dev@dpdk.org; Zhang, AlvinX ; stable@dpdk.org > Subject: RE: [dpdk-dev] [PATCH v2] net/i40e: fix Rx packet statistics >=20 >=20 >=20 > > -----Original Message----- > > From: dev On Behalf Of Alvin Zhang > > Sent: Tuesday, September 28, 2021 11:23 AM > > To: Xing, Beilei ; Guo, Junfeng > > ; ktraynor@redhat.com > > Cc: dev@dpdk.org; Zhang, AlvinX ; > > stable@dpdk.org > > Subject: [dpdk-dev] [PATCH v2] net/i40e: fix Rx packet statistics > > > > Some packets are discarded by the NIC because they are larger than the > > MTU, these packets should be counted as "RX error" instead of "RX > > packet", for > > example: > > > > pkt1 =3D Ether()/IP()/Raw('x' * 1400) > > pkt2 =3D Ether()/IP()/Raw('x' * 1500) > > > > ---------------- Forward statistics for port 0 ----------------- > > RX-packets: 2 RX-dropped: 0 RX-total: 2 > > TX-packets: 1 TX-dropped: 0 TX-total: 1 > > ---------------------------------------------------------------- > > > > Here the packet pkt2 has been discarded, but still was counted > > by "RX-packets" > > > > The register 'GL_RXERR1' can count above discarded packets. > > This patch adds reading and calculation of the 'GL_RXERR1' counter > > when reporting DPDK statistics. > > > > Fixes: f4a91c38b4ad ("i40e: add extended stats") > > Cc: stable@dpdk.org > > > > Signed-off-by: Alvin Zhang > > --- > > drivers/net/i40e/i40e_ethdev.c | 16 +++++++++++++--- > > drivers/net/i40e/i40e_ethdev.h | 10 ++++++++++ > > 2 files changed, 23 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/net/i40e/i40e_ethdev.c > > b/drivers/net/i40e/i40e_ethdev.c index 7a2a828..7a207b2 100644 > > --- a/drivers/net/i40e/i40e_ethdev.c > > +++ b/drivers/net/i40e/i40e_ethdev.c > > @@ -532,7 +532,7 @@ static int i40e_sw_tunnel_filter_insert(struct > > i40e_pf *pf, > > /* store statistics names and its offset in stats structure */ > > struct rte_i40e_xstats_name_off { char > > name[RTE_ETH_XSTATS_NAME_SIZE]; -unsigned offset; > > +int offset; > > }; > > > > static const struct rte_i40e_xstats_name_off rte_i40e_stats_strings[] > > =3D { @@ > > -542,6 +542,8 @@ struct rte_i40e_xstats_name_off { > > {"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)}, > > {"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats, > > rx_unknown_protocol)}, > > +{"rx_size_error_packets", offsetof(struct i40e_pf, rx_err1) - > > + offsetof(struct i40e_pf, stats)}, > > {"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_unicast)}, > > {"tx_multicast_packets", offsetof(struct i40e_eth_stats, > > tx_multicast)}, {"tx_broadcast_packets", offsetof(struct > > i40e_eth_stats, tx_broadcast)}, @@ -3238,6 +3240,10 @@ void > > i40e_flex_payload_reg_set_default(struct > > i40e_hw *hw) > > pf->offset_loaded, > > &os->eth.rx_unknown_protocol, > > &ns->eth.rx_unknown_protocol); > > +i40e_stat_update_48(hw, I40E_GL_RXERR1_H(hw->pf_id + > > I40E_MAX_VF), > > + I40E_GL_RXERR1_L(hw->pf_id + I40E_MAX_VF), > > + pf->offset_loaded, &pf->rx_err1_offset, > > + &pf->rx_err1); > > i40e_stat_update_48_in_64(hw, I40E_GLPRT_GOTCH(hw->port), > > I40E_GLPRT_GOTCL(hw->port), > > pf->offset_loaded, &os->eth.tx_bytes, @@ -3437,7 > > +3443,8 @@ void i40e_flex_payload_reg_set_default(struct i40e_hw *hw) > > stats->ipackets =3D pf->main_vsi->eth_stats.rx_unicast + > > pf->main_vsi->eth_stats.rx_multicast + > > pf->main_vsi->eth_stats.rx_broadcast - > > -pf->main_vsi->eth_stats.rx_discards; > > +pf->main_vsi->eth_stats.rx_discards - rx_err1; > > stats->opackets =3D ns->eth.tx_unicast + ns->eth.tx_multicast + > > ns->eth.tx_broadcast; @@ -3451,7 +3458,8 @@ void > > i40e_flex_payload_reg_set_default(struct > > i40e_hw *hw) > > pf->main_vsi->eth_stats.rx_discards; > > stats->ierrors =3D ns->crc_errors + > > ns->rx_length_errors + ns->rx_undersize + > > -ns->rx_oversize + ns->rx_fragments + ns->rx_jabber; > > +ns->rx_oversize + ns->rx_fragments + ns->rx_jabber + > > +pf->rx_err1; > > > > if (pf->vfs) { > > for (i =3D 0; i < pf->vf_num; i++) { > > @@ -6232,6 +6240,8 @@ struct i40e_vsi * memset(&pf->stats_offset, 0, > > sizeof(struct i40e_hw_port_stats)); memset(&pf->internal_stats, 0, > > sizeof(struct i40e_eth_stats)); memset(&pf->internal_stats_offset, 0, > > sizeof(struct i40e_eth_stats)); > > +pf->rx_err1 =3D 0; > > +pf->rx_err1_offset =3D 0; > > > > ret =3D i40e_pf_get_switch_config(pf); > > if (ret !=3D I40E_SUCCESS) { > > diff --git a/drivers/net/i40e/i40e_ethdev.h > > b/drivers/net/i40e/i40e_ethdev.h index cd6deab..846c8d4 100644 > > --- a/drivers/net/i40e/i40e_ethdev.h > > +++ b/drivers/net/i40e/i40e_ethdev.h > > @@ -19,6 +19,13 @@ > > #include "base/i40e_type.h" > > #include "base/virtchnl.h" > > > > +#define I40E_GL_RXERR1_H(_i)(0x00318004 + ((_i) * 8)) > > +/** > > + * _i=3D0...143, > > + * counters 0-127 are for the 128 VFs, > > + * counters 128-143 are for the 16 PFs */ >=20 > I assume above comment is for I40E_GL_RXERR1_H, so it should above it? Ok, I will update it in v2.=20 Thanks >=20 > > + > > #define I40E_VLAN_TAG_SIZE 4 > > > > #define I40E_AQ_LEN 32 > > @@ -1134,6 +1141,9 @@ struct i40e_pf { > > > > struct i40e_hw_port_stats stats_offset; struct i40e_hw_port_stats > > stats; > > +u64 rx_err1;/* rxerr1 */ > > +u64 rx_err1_offset; > > + > > /* internal packet statistics, it should be excluded from the total > > */ struct i40e_eth_stats internal_stats_offset; struct > > i40e_eth_stats internal_stats; > > -- > > 1.8.3.1 >=20