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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR11MB4491.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 2b316e61-db4c-4190-9002-08d9783749bb X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Sep 2021 10:55:10.4509 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: jx3a5CLZylGn75/Bn37nb/BswR5rYVVxXh9SvvetbWyqaoFhdZHOJApW648LdXfPOmI+xdbSUTECtqOjOJtVQky74zB76A7IRRBxMJXboHA= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR11MB5533 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH v8 03/12] bpf: allow self-xor operation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > When doing BPF filter program conversion, a common way > to zero a register in single instruction is: > xor r7,r7 > The BPF validator would not allow this because the value of > r7 was undefined. But after this operation it always zero. >=20 > Signed-off-by: Stephen Hemminger > --- > lib/bpf/bpf_validate.c | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) >=20 > diff --git a/lib/bpf/bpf_validate.c b/lib/bpf/bpf_validate.c > index 7b1291b382e9..7647a7454dc2 100644 > --- a/lib/bpf/bpf_validate.c > +++ b/lib/bpf/bpf_validate.c > @@ -661,8 +661,12 @@ eval_alu(struct bpf_verifier *bvf, const struct ebpf= _insn *ins) >=20 > op =3D BPF_OP(ins->code); >=20 > - err =3D eval_defined((op !=3D EBPF_MOV) ? rd : NULL, > - (op !=3D BPF_NEG) ? &rs : NULL); > + /* Allow self-xor as way to zero register */ > + if (op =3D=3D BPF_XOR && ins->src_reg =3D=3D ins->dst_reg) > + err =3D NULL; > + else > + err =3D eval_defined((op !=3D EBPF_MOV) ? rd : NULL, > + (op !=3D BPF_NEG) ? &rs : NULL); Two things: - We probably need to check that this is instruction with source register (= not imm value). - rd value is not evaluated to zero, while it probably should (will help evaluator to better predict further values)=20 So might be better to do something like: /* Allow self-xor as way to zero register */ if (op =3D=3D BPF_XOR && BPF_SRC(ins->code) =3D=3D BPF_X && ins->src_reg =3D=3D ins->dst_reg) { eval_fill_imm(&rs, UINT64_MAX, 0); eval_fill_imm(rd, UINT64_MAX, 0); } err =3D eval_defined((op !=3D EBPF_MOV) ? rd : NULL, (op !=3D BPF_NEG) ? &rs : NULL); if (err !=3D NULL) return err; ... Another thing - shouldn't that patch be treated like a fix (cc to stable, e= tc.)? > if (err !=3D NULL) > return err; >=20 > -- > 2.30.2