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From: "Ananyev, Konstantin" <konstantin.ananyev@intel.com>
To: Feifei Wang <feifei.wang2@arm.com>, Ruifeng Wang <ruifeng.wang@arm.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>, "nd@arm.com" <nd@arm.com>
Subject: Re: [dpdk-dev] [RFC PATCH v3 1/5] eal: add new definitions for wait scheme
Date: Thu, 7 Oct 2021 16:18:52 +0000
Message-ID: <DM6PR11MB44919E4C4EC5D4DE04ECAB6D9AB19@DM6PR11MB4491.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20210926063302.1541193-2-feifei.wang2@arm.com>


> Introduce macros as generic interface for address monitoring.
> 
> Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
> ---
>  lib/eal/arm/include/rte_pause_64.h  | 151 ++++++++++++++++++----------
>  lib/eal/include/generic/rte_pause.h |  78 ++++++++++++++
>  2 files changed, 175 insertions(+), 54 deletions(-)
> 
> diff --git a/lib/eal/arm/include/rte_pause_64.h b/lib/eal/arm/include/rte_pause_64.h
> index e87d10b8cc..205510e044 100644
> --- a/lib/eal/arm/include/rte_pause_64.h
> +++ b/lib/eal/arm/include/rte_pause_64.h
> @@ -31,20 +31,12 @@ static inline void rte_pause(void)
>  /* Put processor into low power WFE(Wait For Event) state. */
>  #define __WFE() { asm volatile("wfe" : : : "memory"); }
> 
> -static __rte_always_inline void
> -rte_wait_until_equal_16(volatile uint16_t *addr, uint16_t expected,
> -		int memorder)
> -{
> -	uint16_t value;
> -
> -	assert(memorder == __ATOMIC_ACQUIRE || memorder == __ATOMIC_RELAXED);
> -
> -	/*
> -	 * Atomic exclusive load from addr, it returns the 16-bit content of
> -	 * *addr while making it 'monitored',when it is written by someone
> -	 * else, the 'monitored' state is cleared and a event is generated
> -	 * implicitly to exit WFE.
> -	 */
> +/*
> + * Atomic exclusive load from addr, it returns the 16-bit content of
> + * *addr while making it 'monitored', when it is written by someone
> + * else, the 'monitored' state is cleared and a event is generated
> + * implicitly to exit WFE.
> + */
>  #define __LOAD_EXC_16(src, dst, memorder) {               \
>  	if (memorder == __ATOMIC_RELAXED) {               \
>  		asm volatile("ldxrh %w[tmp], [%x[addr]]"  \
> @@ -58,6 +50,52 @@ rte_wait_until_equal_16(volatile uint16_t *addr, uint16_t expected,
>  			: "memory");                      \
>  	} }
> 
> +/*
> + * Atomic exclusive load from addr, it returns the 32-bit content of
> + * *addr while making it 'monitored', when it is written by someone
> + * else, the 'monitored' state is cleared and a event is generated
> + * implicitly to exit WFE.
> + */
> +#define __LOAD_EXC_32(src, dst, memorder) {              \
> +	if (memorder == __ATOMIC_RELAXED) {              \
> +		asm volatile("ldxr %w[tmp], [%x[addr]]"  \
> +			: [tmp] "=&r" (dst)              \
> +			: [addr] "r"(src)                \
> +			: "memory");                     \
> +	} else {                                         \
> +		asm volatile("ldaxr %w[tmp], [%x[addr]]" \
> +			: [tmp] "=&r" (dst)              \
> +			: [addr] "r"(src)                \
> +			: "memory");                     \
> +	} }
> +
> +/*
> + * Atomic exclusive load from addr, it returns the 64-bit content of
> + * *addr while making it 'monitored', when it is written by someone
> + * else, the 'monitored' state is cleared and a event is generated
> + * implicitly to exit WFE.
> + */
> +#define __LOAD_EXC_64(src, dst, memorder) {              \
> +	if (memorder == __ATOMIC_RELAXED) {              \
> +		asm volatile("ldxr %x[tmp], [%x[addr]]"  \
> +			: [tmp] "=&r" (dst)              \
> +			: [addr] "r"(src)                \
> +			: "memory");                     \
> +	} else {                                         \
> +		asm volatile("ldaxr %x[tmp], [%x[addr]]" \
> +			: [tmp] "=&r" (dst)              \
> +			: [addr] "r"(src)                \
> +			: "memory");                     \
> +	} }
> +
> +static __rte_always_inline void
> +rte_wait_until_equal_16(volatile uint16_t *addr, uint16_t expected,
> +		int memorder)
> +{
> +	uint16_t value;
> +
> +	assert(memorder == __ATOMIC_ACQUIRE || memorder == __ATOMIC_RELAXED);
> +
>  	__LOAD_EXC_16(addr, value, memorder)
>  	if (value != expected) {
>  		__SEVL()
> @@ -66,7 +104,6 @@ rte_wait_until_equal_16(volatile uint16_t *addr, uint16_t expected,
>  			__LOAD_EXC_16(addr, value, memorder)
>  		} while (value != expected);
>  	}
> -#undef __LOAD_EXC_16
>  }
> 
>  static __rte_always_inline void
> @@ -77,25 +114,6 @@ rte_wait_until_equal_32(volatile uint32_t *addr, uint32_t expected,
> 
>  	assert(memorder == __ATOMIC_ACQUIRE || memorder == __ATOMIC_RELAXED);
> 
> -	/*
> -	 * Atomic exclusive load from addr, it returns the 32-bit content of
> -	 * *addr while making it 'monitored',when it is written by someone
> -	 * else, the 'monitored' state is cleared and a event is generated
> -	 * implicitly to exit WFE.
> -	 */
> -#define __LOAD_EXC_32(src, dst, memorder) {              \
> -	if (memorder == __ATOMIC_RELAXED) {              \
> -		asm volatile("ldxr %w[tmp], [%x[addr]]"  \
> -			: [tmp] "=&r" (dst)              \
> -			: [addr] "r"(src)                \
> -			: "memory");                     \
> -	} else {                                         \
> -		asm volatile("ldaxr %w[tmp], [%x[addr]]" \
> -			: [tmp] "=&r" (dst)              \
> -			: [addr] "r"(src)                \
> -			: "memory");                     \
> -	} }
> -
>  	__LOAD_EXC_32(addr, value, memorder)
>  	if (value != expected) {
>  		__SEVL()
> @@ -104,7 +122,6 @@ rte_wait_until_equal_32(volatile uint32_t *addr, uint32_t expected,
>  			__LOAD_EXC_32(addr, value, memorder)
>  		} while (value != expected);
>  	}
> -#undef __LOAD_EXC_32
>  }
> 
>  static __rte_always_inline void
> @@ -115,25 +132,6 @@ rte_wait_until_equal_64(volatile uint64_t *addr, uint64_t expected,
> 
>  	assert(memorder == __ATOMIC_ACQUIRE || memorder == __ATOMIC_RELAXED);
> 
> -	/*
> -	 * Atomic exclusive load from addr, it returns the 64-bit content of
> -	 * *addr while making it 'monitored',when it is written by someone
> -	 * else, the 'monitored' state is cleared and a event is generated
> -	 * implicitly to exit WFE.
> -	 */
> -#define __LOAD_EXC_64(src, dst, memorder) {              \
> -	if (memorder == __ATOMIC_RELAXED) {              \
> -		asm volatile("ldxr %x[tmp], [%x[addr]]"  \
> -			: [tmp] "=&r" (dst)              \
> -			: [addr] "r"(src)                \
> -			: "memory");                     \
> -	} else {                                         \
> -		asm volatile("ldaxr %x[tmp], [%x[addr]]" \
> -			: [tmp] "=&r" (dst)              \
> -			: [addr] "r"(src)                \
> -			: "memory");                     \
> -	} }
> -
>  	__LOAD_EXC_64(addr, value, memorder)
>  	if (value != expected) {
>  		__SEVL()
> @@ -143,6 +141,51 @@ rte_wait_until_equal_64(volatile uint64_t *addr, uint64_t expected,
>  		} while (value != expected);
>  	}
>  }
> +
> +#define rte_wait_event_16(addr, mask, expected, cond, memorder)                \
> +do {									       \
> +	uint16_t value                                                         \
> +	assert(memorder == __ATOMIC_ACQUIRE || memorder == __ATOMIC_RELAXED);  \
> +	__LOAD_EXC_16(addr, value, memorder)				       \
> +	if ((value & mask) cond expected) {				       \
> +		__SEVL()						       \
> +		do {							       \
> +			__WFE()						       \
> +			__LOAD_EXC_16(addr, value, memorder)		       \
> +		} while ((value & mask) cond expected);			       \
> +	}								       \
> +} while (0)
> +
> +#define rte_wait_event_32(addr, mask, expected, cond, memorder)                \
> +do {                                                                           \
> +	uint32_t value                                                         \
> +	assert(memorder == __ATOMIC_ACQUIRE || memorder == __ATOMIC_RELAXED);  \
> +	__LOAD_EXC_32(addr, value, memorder)                                   \
> +	if ((value & mask) op expected) {                                      \
> +		__SEVL()                                                       \
> +		do {                                                           \
> +			__WFE()                                                \
> +			__LOAD_EXC_32(addr, value, memorder)                   \
> +		} while ((value & mask) cond expected);                        \
> +	}                                                                      \
> +} while (0)
> +
> +#define rte_wait_event_64(addr, mask, expected, cond, memorder)                \
> +do {                                                                           \
> +	uint64_t value                                                         \
> +	assert(memorder == __ATOMIC_ACQUIRE || memorder == __ATOMIC_RELAXED);  \
> +	__LOAD_EXC_64(addr, value, memorder)                                   \
> +	if ((value & mask) cond expected) {                                    \
> +		__SEVL()                                                       \
> +		do {                                                           \
> +			__WFE()                                                \
> +			__LOAD_EXC_64(addr, value, memorder)                   \
> +		} while ((value & mask) cond expected);                        \
> +	}                                                                      \
> +} while (0)
> +
> +#undef __LOAD_EXC_16
> +#undef __LOAD_EXC_32
>  #undef __LOAD_EXC_64
> 
>  #undef __SEVL
> diff --git a/lib/eal/include/generic/rte_pause.h b/lib/eal/include/generic/rte_pause.h
> index 668ee4a184..4e32107eca 100644
> --- a/lib/eal/include/generic/rte_pause.h
> +++ b/lib/eal/include/generic/rte_pause.h
> @@ -111,6 +111,84 @@ rte_wait_until_equal_64(volatile uint64_t *addr, uint64_t expected,
>  	while (__atomic_load_n(addr, memorder) != expected)
>  		rte_pause();
>  }
> +
> +/*
> + * Wait until a 16-bit *addr breaks the condition, with a relaxed memory
> + * ordering model meaning the loads around this API can be reordered.
> + *
> + * @param addr
> + *  A pointer to the memory location.
> + * @param mask
> + *  A mask of value bits in interest
> + * @param expected
> + *  A 16-bit expected value to be in the memory location.
> + * @param cond
> + *  A symbol representing the condition (==, !=).
> + * @param memorder
> + *  Two different memory orders that can be specified:
> + *  __ATOMIC_ACQUIRE and __ATOMIC_RELAXED. These map to
> + *  C++11 memory orders with the same names, see the C++11 standard or
> + *  the GCC wiki on atomic synchronization for detailed definition.
> + */

Hmm, so now we have 2 APIs doing similar thing:
rte_wait_until_equal_n() and rte_wait_event_n().
Can we probably unite them somehow?
At least make rte_wait_until_equal_n() to use rte_wait_event_n() underneath.

> +#define rte_wait_event_16(addr, mask, expected, cond, memorder)		       \
> +do {									       \
> +	assert(memorder == __ATOMIC_ACQUIRE || memorder == __ATOMIC_RELAXED);  \

And why user is not allowed to use __ATOMIC_SEQ_CST here?
BTW, if we expect memorder to always be a constant, might be better BUILD_BUG_ON()?

> +									       \
> +	while ((__atomic_load_n(addr, memorder) & mask) cond expected)	       \
> +		rte_pause();						       \
> +} while (0)

Two thoughts with these macros:
1. It is a goof practise to put () around macro parameters in the macro body.
Will save from a lot of unexpected troubles.
2. I think these 3 macros can be united into one.
Something like:

#define rte_wait_event(addr, mask, expected, cond, memorder) do {\
        typeof (*(addr)) val = __atomic_load_n((addr), (memorder)); \
        if ((val & (typeof(val))(mask)) cond (typeof(val))(expected)) \
                break; \
        rte_pause(); \
} while (1);


> +
> +/*
> + * Wait until a 32-bit *addr breaks the condition, with a relaxed memory
> + * ordering model meaning the loads around this API can be reordered.
> + *
> + * @param addr
> + *  A pointer to the memory location.
> + * @param mask
> + *  A mask of value bits in interest.
> + * @param expected
> + *  A 32-bit expected value to be in the memory location.
> + * @param cond
> + *  A symbol representing the condition (==, !=).
> + * @param memorder
> + *  Two different memory orders that can be specified:
> + *  __ATOMIC_ACQUIRE and __ATOMIC_RELAXED. These map to
> + *  C++11 memory orders with the same names, see the C++11 standard or
> + *  the GCC wiki on atomic synchronization for detailed definition.
> + */
> +#define rte_wait_event_32(addr, mask, expected, cond, memorder)		       \
> +do {									       \
> +	assert(memorder == __ATOMIC_ACQUIRE || memorder == __ATOMIC_RELAXED);  \
> +									       \
> +	while ((__atomic_load_n(addr, memorder) & mask) cond expected)	       \
> +		rte_pause();						       \
> +} while (0)
> +
> +/*
> + * Wait until a 64-bit *addr breaks the condition, with a relaxed memory
> + * ordering model meaning the loads around this API can be reordered.
> + *
> + * @param addr
> + *  A pointer to the memory location.
> + * @param mask
> + *  A mask of value bits in interest
> + * @param expected
> + *  A 64-bit expected value to be in the memory location.
> + * @param cond
> + *  A symbol representing the condition (==, !=).
> + * @param memorder
> + *  Two different memory orders that can be specified:
> + *  __ATOMIC_ACQUIRE and __ATOMIC_RELAXED. These map to
> + *  C++11 memory orders with the same names, see the C++11 standard or
> + *  the GCC wiki on atomic synchronization for detailed definition.
> + */
> +#define rte_wait_event_64(addr, mask, expected, cond, memorder)		       \
> +do {									       \
> +	assert(memorder == __ATOMIC_ACQUIRE || memorder == __ATOMIC_RELAXED);  \
> +									       \
> +	while ((__atomic_load_n(addr, memorder) & mask) cond expected)	       \
> +		rte_pause();						       \
> +} while (0)
>  #endif
> 
>  #endif /* _RTE_PAUSE_H_ */
> --
> 2.25.1


  reply	other threads:[~2021-10-07 16:19 UTC|newest]

Thread overview: 113+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-02  5:32 [dpdk-dev] [RFC PATCH v1 0/5] add new API for wait until scheme Feifei Wang
2021-09-02  5:32 ` [dpdk-dev] [RFC PATCH v1 1/5] eal: " Feifei Wang
2021-09-02  5:32 ` [dpdk-dev] [RFC PATCH v1 2/5] eal: use wait until scheme for read pflock Feifei Wang
2021-09-02  5:32 ` [dpdk-dev] [RFC PATCH v1 3/5] eal: use wait until scheme for mcslock Feifei Wang
2021-09-02  5:32 ` [dpdk-dev] [RFC PATCH v1 4/5] lib/bpf: use wait until scheme for Rx/Tx iteration Feifei Wang
2021-09-02  5:32 ` [dpdk-dev] [RFC PATCH v1 5/5] lib/distributor: use wait until scheme Feifei Wang
2021-09-02 15:22 ` [dpdk-dev] [RFC PATCH v1 0/5] add new API for " Stephen Hemminger
2021-09-03  7:02   ` [dpdk-dev] 回复: " Feifei Wang
2021-09-23  9:58 ` [dpdk-dev] [RFC PATCH v2 0/5] add new definitions for wait scheme Feifei Wang
2021-09-23  9:58   ` [dpdk-dev] [RFC PATCH v2 1/5] eal: " Feifei Wang
2021-09-23  9:58   ` [dpdk-dev] [RFC PATCH v2 2/5] eal: use wait event for read pflock Feifei Wang
2021-09-23  9:59   ` [dpdk-dev] [RFC PATCH v2 3/5] eal: use wait event scheme for mcslock Feifei Wang
2021-09-23  9:59   ` [dpdk-dev] [RFC PATCH v2 4/5] lib/bpf: use wait event scheme for Rx/Tx iteration Feifei Wang
2021-09-24 18:07     ` Ananyev, Konstantin
2021-09-26  2:19       ` [dpdk-dev] 回复: " Feifei Wang
2021-09-23  9:59   ` [dpdk-dev] [RFC PATCH v2 5/5] lib/distributor: use wait event scheme Feifei Wang
2021-09-26  6:32 ` [dpdk-dev] [RFC PATCH v3 0/5] add new definitions for wait scheme Feifei Wang
2021-09-26  6:32   ` [dpdk-dev] [RFC PATCH v3 1/5] eal: " Feifei Wang
2021-10-07 16:18     ` Ananyev, Konstantin [this message]
2021-10-12  8:09       ` [dpdk-dev] 回复: " Feifei Wang
2021-10-13 15:03         ` [dpdk-dev] " Ananyev, Konstantin
2021-10-13 17:00           ` Stephen Hemminger
2021-10-14  3:14             ` [dpdk-dev] 回复: " Feifei Wang
2021-10-14  3:08           ` Feifei Wang
2021-09-26  6:32   ` [dpdk-dev] [RFC PATCH v3 2/5] eal: use wait event for read pflock Feifei Wang
2021-09-26  6:33   ` [dpdk-dev] [RFC PATCH v3 3/5] eal: use wait event scheme for mcslock Feifei Wang
2021-09-26  6:33   ` [dpdk-dev] [RFC PATCH v3 4/5] lib/bpf: use wait event scheme for Rx/Tx iteration Feifei Wang
2021-10-07 15:50     ` Ananyev, Konstantin
2021-10-07 17:40       ` Ananyev, Konstantin
2021-10-20  6:20         ` [dpdk-dev] 回复: " Feifei Wang
2021-09-26  6:33   ` [dpdk-dev] [RFC PATCH v3 5/5] lib/distributor: use wait event scheme Feifei Wang
2021-10-20  8:45   ` [dpdk-dev] [PATCH v4 0/5] add new definitions for wait scheme Feifei Wang
2021-10-20  8:45     ` [dpdk-dev] [PATCH v4 1/5] eal: " Feifei Wang
2021-10-21 16:24       ` Ananyev, Konstantin
2021-10-25  9:20         ` [dpdk-dev] 回复: " Feifei Wang
2021-10-25 14:28           ` [dpdk-dev] " Ananyev, Konstantin
2021-10-26  1:08             ` [dpdk-dev] 回复: " Feifei Wang
2021-10-22  0:10       ` [dpdk-dev] " Jerin Jacob
2021-10-25  9:30         ` [dpdk-dev] 回复: " Feifei Wang
2021-10-25  9:43           ` [dpdk-dev] " Jerin Jacob
2021-10-26  1:11             ` [dpdk-dev] 回复: " Feifei Wang
2021-10-20  8:45     ` [dpdk-dev] [PATCH v4 2/5] eal: use wait event for read pflock Feifei Wang
2021-10-20  8:45     ` [dpdk-dev] [PATCH v4 3/5] eal: use wait event scheme for mcslock Feifei Wang
2021-10-20  8:45     ` [dpdk-dev] [PATCH v4 4/5] lib/bpf: use wait event scheme for Rx/Tx iteration Feifei Wang
2021-10-20  8:45     ` [dpdk-dev] [PATCH v4 5/5] lib/distributor: use wait event scheme Feifei Wang
2021-10-26  8:01 ` [dpdk-dev] [PATCH v5 0/5] add new definitions for wait scheme Feifei Wang
2021-10-26  8:02   ` [dpdk-dev] [PATCH v5 1/5] eal: " Feifei Wang
2021-10-26  8:08     ` [dpdk-dev] 回复: " Feifei Wang
2021-10-26  9:46       ` [dpdk-dev] " Ananyev, Konstantin
2021-10-26  9:59         ` Ananyev, Konstantin
2021-10-27  6:56           ` [dpdk-dev] 回复: " Feifei Wang
2021-10-26  8:02   ` [dpdk-dev] [PATCH v5 2/5] eal: use wait event for read pflock Feifei Wang
2021-10-26  8:02   ` [dpdk-dev] [PATCH v5 3/5] eal: use wait event scheme for mcslock Feifei Wang
2021-10-26  8:02   ` [dpdk-dev] [PATCH v5 4/5] lib/bpf: use wait event scheme for Rx/Tx iteration Feifei Wang
2021-10-26  8:18     ` [dpdk-dev] 回复: " Feifei Wang
2021-10-26  9:43       ` [dpdk-dev] " Ananyev, Konstantin
2021-10-26 12:56         ` Ananyev, Konstantin
2021-10-27  7:04           ` [dpdk-dev] 回复: " Feifei Wang
2021-10-27  7:31             ` Feifei Wang
2021-10-27 14:47             ` [dpdk-dev] " Ananyev, Konstantin
2021-10-28  6:24               ` [dpdk-dev] 回复: " Feifei Wang
2021-10-26  8:02   ` [dpdk-dev] [PATCH v5 5/5] lib/distributor: use wait event scheme Feifei Wang
2021-10-27  8:10 ` [dpdk-dev] [PATCH v6 0/4] add new definitions for wait scheme Feifei Wang
2021-10-27  8:10   ` [dpdk-dev] [PATCH v6 1/4] eal: " Feifei Wang
2021-10-27  8:10   ` [dpdk-dev] [PATCH v6 2/4] eal: use wait event for read pflock Feifei Wang
2021-10-27  8:10   ` [dpdk-dev] [PATCH v6 3/4] eal: use wait event scheme for mcslock Feifei Wang
2021-10-27 11:16     ` Mattias Rönnblom
2021-10-28  6:32       ` [dpdk-dev] 回复: " Feifei Wang
2021-10-27  8:10   ` [dpdk-dev] [PATCH v6 4/4] lib/distributor: use wait event scheme Feifei Wang
2021-10-27 10:57   ` [dpdk-dev] [PATCH v6 0/4] add new definitions for wait scheme Jerin Jacob
2021-10-28  6:33     ` [dpdk-dev] 回复: " Feifei Wang
2021-10-28  6:56 ` [dpdk-dev] [PATCH v7 0/5] " Feifei Wang
2021-10-28  6:56   ` [dpdk-dev] [PATCH v7 1/5] eal: " Feifei Wang
2021-10-28  7:15     ` Jerin Jacob
2021-10-28  7:40       ` [dpdk-dev] 回复: " Feifei Wang
2021-10-28  7:51         ` [dpdk-dev] " Jerin Jacob
2021-10-28  9:27           ` [dpdk-dev] 回复: " Feifei Wang
2021-10-28 13:14     ` [dpdk-dev] " Ananyev, Konstantin
2021-10-28  6:56   ` [dpdk-dev] [PATCH v7 2/5] eal: use wait event for read pflock Feifei Wang
2021-10-28  6:56   ` [dpdk-dev] [PATCH v7 3/5] eal: use wait event scheme for mcslock Feifei Wang
2021-10-28  7:02     ` Jerin Jacob
2021-10-28  7:14       ` [dpdk-dev] 回复: " Feifei Wang
2021-10-28  6:56   ` [dpdk-dev] [PATCH v7 4/5] lib/bpf: use wait event scheme for Rx/Tx iteration Feifei Wang
2021-10-28 13:15     ` Ananyev, Konstantin
2021-10-28  6:56   ` [dpdk-dev] [PATCH v7 5/5] lib/distributor: use wait event scheme Feifei Wang
2021-10-29  8:20 ` [dpdk-dev] [PATCH v8 0/5] add new definitions for wait scheme Feifei Wang
2021-10-29  8:20   ` [dpdk-dev] [PATCH v8 1/5] eal: " Feifei Wang
2021-10-29 13:54     ` Jerin Jacob
2021-10-31  8:38     ` David Marchand
2021-11-01  2:29       ` [dpdk-dev] 回复: " Feifei Wang
2021-10-29  8:20   ` [dpdk-dev] [PATCH v8 2/5] eal: use wait event for read pflock Feifei Wang
2021-10-29 13:55     ` Jerin Jacob
2021-10-31  8:37     ` David Marchand
2021-10-29  8:20   ` [dpdk-dev] [PATCH v8 3/5] eal: use wait event scheme for mcslock Feifei Wang
2021-10-29 13:55     ` Jerin Jacob
2021-10-31  8:37     ` David Marchand
2021-10-29  8:20   ` [dpdk-dev] [PATCH v8 4/5] lib/bpf: use wait event scheme for Rx/Tx iteration Feifei Wang
2021-10-31  8:37     ` David Marchand
2021-10-29  8:20   ` [dpdk-dev] [PATCH v8 5/5] lib/distributor: use wait event scheme Feifei Wang
2021-10-29 13:58     ` Jerin Jacob
2021-10-31  8:38       ` David Marchand
2021-11-01 12:44       ` David Hunt
2021-11-01  6:00 ` [dpdk-dev] [PATCH v9 0/5] add new helper for wait scheme Feifei Wang
2021-11-01  6:00   ` [dpdk-dev] [PATCH v9 1/5] eal: add a new generic " Feifei Wang
2021-11-01  6:00   ` [dpdk-dev] [PATCH v9 2/5] pflock: use wait until scheme for read pflock Feifei Wang
2021-11-03 14:46     ` David Marchand
2021-11-04  1:24       ` [dpdk-dev] 回复: " Feifei Wang
2021-11-01  6:00   ` [dpdk-dev] [PATCH v9 3/5] mcslock: use wait until scheme for mcslock Feifei Wang
2021-11-01  6:00   ` [dpdk-dev] [PATCH v9 4/5] bpf: use wait until scheme for Rx/Tx iteration Feifei Wang
2021-11-01  6:00   ` [dpdk-dev] [PATCH v9 5/5] distributor: use wait until scheme Feifei Wang
2021-11-01 16:05     ` Pattan, Reshma
2021-11-02  2:00       ` [dpdk-dev] 回复: " Feifei Wang
2021-11-03 14:55   ` [dpdk-dev] [PATCH v9 0/5] add new helper for wait scheme David Marchand

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