RE: [PATCH] common/mlx5: decrease log level for hlist creation

[Slava Ovsiienko <viacheslavo@nvidia.com>]

Hi, David

> -----Original Message-----
> From: David Marchand <david.marchand@redhat.com>
> Sent: Thursday, November 18, 2021 16:23
> To: Slava Ovsiienko <viacheslavo@nvidia.com>
> Cc: dev@dpdk.org; NBU-Contact-Thomas Monjalon <thomas@monjalon.net>;
> ferruh.yigit@intel.com; Matan Azrad <matan@nvidia.com>; Suanming Mou
> <suanmingm@nvidia.com>; Maxime Coquelin
> <maxime.coquelin@redhat.com>
> Subject: Re: [PATCH] common/mlx5: decrease log level for hlist creation
> 
> Hi Slava,
> 
> On Wed, Nov 17, 2021 at 3:46 PM David Marchand
> <david.marchand@redhat.com> wrote:
> >
> > On Wed, Nov 17, 2021 at 2:28 PM Slava Ovsiienko
> <viacheslavo@nvidia.com> wrote:
> > >
> > > I've re-checked the mlx5_hlist_create() call tree.
> > >
> > > And it seems all the calls are done with hardcoded  const values for
> > > "size" argument, and all these values are powers-of-2.
> > >
> > > We had an issue in the past, but then I was not seeing this warning
> > > for a long time on my setup.
> >
> > I'll double check with Maxime.
> > There might be a misunderstanding between us.
> 
> Maxime passed me his setup with a CX6.
> I confirm there is no warning in main and the problem has been fixed in
> v20.11 LTS.
> Sorry for the noise, I'll withdraw this patch.
> 
> Thanks.
> 
> 
> For the record:
> - v20.11 and v20.11.1 has logs about:
> mlx5_pci: Size 0xFFFF is not power of 2, will be aligned to 0x10000.
> mlx5_pci: Failed to init cache list FDB_ingress_0_matcher_cache entry (nil).
> 
> - v20.11.2 has only:
> mlx5_pci: Failed to init cache list FDB_ingress_0_matcher_cache entry (nil).
> 
> - v20.11.3 has no warning
Thanks a lot for checking and clear confirmation.

With best regards,
Slava