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Tue, 11 May 2021 07:44:43 +0000 Received: from DM6PR12MB3753.namprd12.prod.outlook.com ([fe80::c595:e3bc:686c:16a4]) by DM6PR12MB3753.namprd12.prod.outlook.com ([fe80::c595:e3bc:686c:16a4%5]) with mapi id 15.20.4108.031; Tue, 11 May 2021 07:44:43 +0000 From: Slava Ovsiienko To: "Xueming(Steven) Li" CC: "dev@dpdk.org" , "Xueming(Steven) Li" , "stable@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH v2] net/mlx5: fix LAG representor probe on PF1 PCI Thread-Index: AQHXRZ5fl/x1q0bZnkKfLnqbCubFtard55UA Date: Tue, 11 May 2021 07:44:43 +0000 Message-ID: References: <20210422072446.29455-1-xuemingl@nvidia.com> <20210510131342.18911-1-xuemingl@nvidia.com> In-Reply-To: <20210510131342.18911-1-xuemingl@nvidia.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: nvidia.com; dkim=none (message not signed) header.d=none;nvidia.com; dmarc=none action=none header.from=nvidia.com; x-originating-ip: [188.163.75.124] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 8c710eb7-49ab-4831-eb7d-08d91450a421 x-ms-traffictypediagnostic: DM5PR12MB2422: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:2958; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR12MB3753.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8c710eb7-49ab-4831-eb7d-08d91450a421 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 May 2021 07:44:43.1672 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Rz31bd56RcwzhmMZSyTW3zyAUw+FeqBuHGrQxk6ei5fegQ0kWLbyy3sPqKivVnbc3xkdYJ8oRA3yzQn1KzMfSA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB2422 Subject: Re: [dpdk-dev] [PATCH v2] net/mlx5: fix LAG representor probe on PF1 PCI X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: dev On Behalf Of Xueming Li > Sent: Monday, May 10, 2021 16:14 > Cc: dev@dpdk.org; Xueming(Steven) Li ; > stable@dpdk.org > Subject: [dpdk-dev] [PATCH v2] net/mlx5: fix LAG representor probe on PF1 > PCI >=20 > In case of bonding, orchestrator wants to use same devargs for LAG and no= n- > LAG scenario to probe representor on PF1 using PF1 PCI address like > ",representor=3Dpf1vf[0-3]". >=20 > This patch changes PCI address check policy to allow PF1 PCI address for > representors on PF1. >=20 > Note: detaching PF0 device can't remove representors on PF1. It's > recommended to use primary(PF0) PCI address to probe representors on > both PFs. >=20 > Fixes: f926cce3fa94 ("net/mlx5: refactor bonding representor probing") >=20 > Cc: stable@dpdk.org > Signed-off-by: Xueming Li Acked-by: Viacheslav Ovsiienko