* [dpdk-dev] [PATCH] net/mlx5: probe LAG representor with PF1 PCI address
@ 2021-04-22 7:24 Xueming Li
2021-05-06 11:27 ` Slava Ovsiienko
2021-05-10 13:13 ` [dpdk-dev] [PATCH v2] net/mlx5: fix LAG representor probe on PF1 PCI Xueming Li
0 siblings, 2 replies; 5+ messages in thread
From: Xueming Li @ 2021-04-22 7:24 UTC (permalink / raw)
Cc: dev, xuemingl, Matan Azrad, Shahaf Shuler, Viacheslav Ovsiienko
In case of bonding, orchestrator wants to use same devargs for LAG and
non-LAG scenario, to probe representor on PF1 using PF1 PCI address
like "<DBDF_PF1>,representor=pf1vf[0-3]".
This patch changes PCI address check policy to allow PF1 PCI address for
representors on PF1.
Note: detaching PF0 device can't remove representors on PF1. It's
recommended to use primary(PF0) PCI address to probe representors on
both PFs.
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
---
drivers/net/mlx5/linux/mlx5_os.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index 76c72d0e38..22271e289a 100644
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -1875,11 +1875,14 @@ mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
tmp_str);
break;
}
- /* Match PCI address. */
+ /* Match PCI address, allows BDF0+pfx or BDFx+pfx. */
if (pci_dev->domain == pci_addr.domain &&
pci_dev->bus == pci_addr.bus &&
pci_dev->devid == pci_addr.devid &&
- pci_dev->function + owner == pci_addr.function)
+ ((pci_dev->function == 0 &&
+ pci_dev->function + owner == pci_addr.function) ||
+ (pci_dev->function == owner &&
+ pci_addr.function == owner)))
pf = info.port_name;
/* Get ifindex. */
snprintf(tmp_str, sizeof(tmp_str),
--
2.25.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [dpdk-dev] [PATCH] net/mlx5: probe LAG representor with PF1 PCI address
2021-04-22 7:24 [dpdk-dev] [PATCH] net/mlx5: probe LAG representor with PF1 PCI address Xueming Li
@ 2021-05-06 11:27 ` Slava Ovsiienko
2021-05-10 13:13 ` [dpdk-dev] [PATCH v2] net/mlx5: fix LAG representor probe on PF1 PCI Xueming Li
1 sibling, 0 replies; 5+ messages in thread
From: Slava Ovsiienko @ 2021-05-06 11:27 UTC (permalink / raw)
To: Xueming(Steven) Li; +Cc: dev, Xueming(Steven) Li, Matan Azrad, Shahaf Shuler
Hi, Xuemig
This patch looks like a fix - could you, please add the "Fixes:" tag and modify the headline?
With best regards,
Slava
> -----Original Message-----
> From: Xueming Li <xuemingl@nvidia.com>
> Sent: Thursday, April 22, 2021 10:25
> Cc: dev@dpdk.org; Xueming(Steven) Li <xuemingl@nvidia.com>; Matan
> Azrad <matan@nvidia.com>; Shahaf Shuler <shahafs@nvidia.com>; Slava
> Ovsiienko <viacheslavo@nvidia.com>
> Subject: [PATCH] net/mlx5: probe LAG representor with PF1 PCI address
>
> In case of bonding, orchestrator wants to use same devargs for LAG and non-
> LAG scenario, to probe representor on PF1 using PF1 PCI address like
> "<DBDF_PF1>,representor=pf1vf[0-3]".
>
> This patch changes PCI address check policy to allow PF1 PCI address for
> representors on PF1.
>
> Note: detaching PF0 device can't remove representors on PF1. It's
> recommended to use primary(PF0) PCI address to probe representors on
> both PFs.
>
> Signed-off-by: Xueming Li <xuemingl@nvidia.com>
> ---
> drivers/net/mlx5/linux/mlx5_os.c | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/mlx5/linux/mlx5_os.c
> b/drivers/net/mlx5/linux/mlx5_os.c
> index 76c72d0e38..22271e289a 100644
> --- a/drivers/net/mlx5/linux/mlx5_os.c
> +++ b/drivers/net/mlx5/linux/mlx5_os.c
> @@ -1875,11 +1875,14 @@ mlx5_device_bond_pci_match(const struct
> ibv_device *ibv_dev,
> tmp_str);
> break;
> }
> - /* Match PCI address. */
> + /* Match PCI address, allows BDF0+pfx or BDFx+pfx. */
> if (pci_dev->domain == pci_addr.domain &&
> pci_dev->bus == pci_addr.bus &&
> pci_dev->devid == pci_addr.devid &&
> - pci_dev->function + owner == pci_addr.function)
> + ((pci_dev->function == 0 &&
> + pci_dev->function + owner == pci_addr.function) ||
> + (pci_dev->function == owner &&
> + pci_addr.function == owner)))
> pf = info.port_name;
> /* Get ifindex. */
> snprintf(tmp_str, sizeof(tmp_str),
> --
> 2.25.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [dpdk-dev] [PATCH v2] net/mlx5: fix LAG representor probe on PF1 PCI
2021-04-22 7:24 [dpdk-dev] [PATCH] net/mlx5: probe LAG representor with PF1 PCI address Xueming Li
2021-05-06 11:27 ` Slava Ovsiienko
@ 2021-05-10 13:13 ` Xueming Li
2021-05-11 7:44 ` Slava Ovsiienko
1 sibling, 1 reply; 5+ messages in thread
From: Xueming Li @ 2021-05-10 13:13 UTC (permalink / raw)
Cc: dev, xuemingl, stable
In case of bonding, orchestrator wants to use same devargs for LAG and
non-LAG scenario to probe representor on PF1 using PF1 PCI address
like "<DBDF_PF1>,representor=pf1vf[0-3]".
This patch changes PCI address check policy to allow PF1 PCI address for
representors on PF1.
Note: detaching PF0 device can't remove representors on PF1. It's
recommended to use primary(PF0) PCI address to probe representors on
both PFs.
Fixes: f926cce3fa94 ("net/mlx5: refactor bonding representor probing")
Cc: stable@dpdk.org
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
---
drivers/net/mlx5/linux/mlx5_os.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c
index 5ac787106d..47606d292a 100644
--- a/drivers/net/mlx5/linux/mlx5_os.c
+++ b/drivers/net/mlx5/linux/mlx5_os.c
@@ -1877,11 +1877,14 @@ mlx5_device_bond_pci_match(const struct ibv_device *ibv_dev,
tmp_str);
break;
}
- /* Match PCI address. */
+ /* Match PCI address, allows BDF0+pfx or BDFx+pfx. */
if (pci_dev->domain == pci_addr.domain &&
pci_dev->bus == pci_addr.bus &&
pci_dev->devid == pci_addr.devid &&
- pci_dev->function + owner == pci_addr.function)
+ ((pci_dev->function == 0 &&
+ pci_dev->function + owner == pci_addr.function) ||
+ (pci_dev->function == owner &&
+ pci_addr.function == owner)))
pf = info.port_name;
/* Get ifindex. */
snprintf(tmp_str, sizeof(tmp_str),
--
2.25.1
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [dpdk-dev] [PATCH v2] net/mlx5: fix LAG representor probe on PF1 PCI
2021-05-10 13:13 ` [dpdk-dev] [PATCH v2] net/mlx5: fix LAG representor probe on PF1 PCI Xueming Li
@ 2021-05-11 7:44 ` Slava Ovsiienko
2021-05-12 10:35 ` Thomas Monjalon
0 siblings, 1 reply; 5+ messages in thread
From: Slava Ovsiienko @ 2021-05-11 7:44 UTC (permalink / raw)
To: Xueming(Steven) Li; +Cc: dev, Xueming(Steven) Li, stable
> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Xueming Li
> Sent: Monday, May 10, 2021 16:14
> Cc: dev@dpdk.org; Xueming(Steven) Li <xuemingl@nvidia.com>;
> stable@dpdk.org
> Subject: [dpdk-dev] [PATCH v2] net/mlx5: fix LAG representor probe on PF1
> PCI
>
> In case of bonding, orchestrator wants to use same devargs for LAG and non-
> LAG scenario to probe representor on PF1 using PF1 PCI address like
> "<DBDF_PF1>,representor=pf1vf[0-3]".
>
> This patch changes PCI address check policy to allow PF1 PCI address for
> representors on PF1.
>
> Note: detaching PF0 device can't remove representors on PF1. It's
> recommended to use primary(PF0) PCI address to probe representors on
> both PFs.
>
> Fixes: f926cce3fa94 ("net/mlx5: refactor bonding representor probing")
>
> Cc: stable@dpdk.org
> Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [dpdk-dev] [PATCH v2] net/mlx5: fix LAG representor probe on PF1 PCI
2021-05-11 7:44 ` Slava Ovsiienko
@ 2021-05-12 10:35 ` Thomas Monjalon
0 siblings, 0 replies; 5+ messages in thread
From: Thomas Monjalon @ 2021-05-12 10:35 UTC (permalink / raw)
To: Xueming(Steven) Li; +Cc: dev, stable, Slava Ovsiienko
> > In case of bonding, orchestrator wants to use same devargs for LAG and non-
> > LAG scenario to probe representor on PF1 using PF1 PCI address like
> > "<DBDF_PF1>,representor=pf1vf[0-3]".
> >
> > This patch changes PCI address check policy to allow PF1 PCI address for
> > representors on PF1.
> >
> > Note: detaching PF0 device can't remove representors on PF1. It's
> > recommended to use primary(PF0) PCI address to probe representors on
> > both PFs.
> >
> > Fixes: f926cce3fa94 ("net/mlx5: refactor bonding representor probing")
> >
> > Cc: stable@dpdk.org
> > Signed-off-by: Xueming Li <xuemingl@nvidia.com>
> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Applied to next-net-mlx, thanks.
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2021-05-12 10:36 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2021-04-22 7:24 [dpdk-dev] [PATCH] net/mlx5: probe LAG representor with PF1 PCI address Xueming Li
2021-05-06 11:27 ` Slava Ovsiienko
2021-05-10 13:13 ` [dpdk-dev] [PATCH v2] net/mlx5: fix LAG representor probe on PF1 PCI Xueming Li
2021-05-11 7:44 ` Slava Ovsiienko
2021-05-12 10:35 ` Thomas Monjalon
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