From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0653DA0C43; Fri, 22 Oct 2021 14:00:30 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 8C8B84114A; Fri, 22 Oct 2021 14:00:30 +0200 (CEST) Received: from NAM04-DM6-obe.outbound.protection.outlook.com (mail-dm6nam08on2053.outbound.protection.outlook.com [40.107.102.53]) by mails.dpdk.org (Postfix) with ESMTP id 9167241149 for ; Fri, 22 Oct 2021 14:00:28 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=bVn7M9mxw78y4kf/lXvltrqOyYtc5S/TvlQ6q1JxVPYNcQKIPEVS9pH+ON8LNhu1udWkGcssn31k/gnzkXOT5mlBfTCI1VIkAwryv+tWA6b/TlBrMJsUpOEeMHgSXQepFSheagCLLNlWngQh+degcbm4m8IWVQPqdVQBXQTTLfokD4UzWOh/yl9BpAkDjQ2AhlanopJ5VoSYckHBIuKpI7v0paLr4rVhnMNytGj8eh4dJEMBVpOi6PP1nfkbeOLMs+WSjAfbFwLedZtLo7+gHzdAyZGg5fOLWvaH3tXq3VXk11LZIsWKE2BFuu52P6BWTcy0lF2F6iFLCy9wae0lKg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=aBEqgaSgbroLIzx6Xo30S88sBLOz168/cgK3xiWDd9k=; b=J8bhZlpDc//zNsL/uvRbCwW52KYbqza0bcRrvOjg3JWtjMxOTiD/snguqF70TNUTjEC45+/TVfxjj/J3C42FFb/r0MDsf02b5LT7dfRQgpXbnC0xH8754B1+HW2WbJgugmQ84FeziHPYtZYOc7qDM67VMoqG2f0o35Pid0DGiZemhpeiN2imL8kkw+IXBqlQYjFXlzq6iUJltUU1U5/KKCp51YoFhbFF2upGg+VCp+cKy2hfLN+g6hmFr3QUhjSdXlG7HlqwZx9DVfWSn6e+IHdZaXisjGUwE/Y0mARgj7WNrRKH5+IO2mzh9yJh2RWj6hz6STMmcnVHamoZyC9ajw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nvidia.com; dmarc=pass action=none header.from=nvidia.com; dkim=pass header.d=nvidia.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=aBEqgaSgbroLIzx6Xo30S88sBLOz168/cgK3xiWDd9k=; b=roACnhyhXEQpaHNgUmipUYqI3am/VR9qF2YjlT9gc1xeezRyAUZxQXvJ6Yab55iFO2dbkisv7fKWnX70Mk5338PM9hCVl5DYgN3WyTe5W6rcKTdTH8aviYdaVaU6W/1nnwqwFAomHaBQqe3FhB0hHLhR8XnS7IqZYtOPGTSz5d+cqvxtbBBH2w6W4xqXCGgIaI3T2RfBc1ZIj8HN2cAUs7UpXwJfcVWVJTGpPJ9YlPcSHvECdj+BXBGio5pt1RwbWz92h0/Qxk4Kcp8T0GawFTP+xfq/pdMDOwfF1+ttL0fIXL+MWUXYo/YQGz9dR2kbpmyPOsPimQ54wWOFt8/LNw== Received: from DM6PR12MB4107.namprd12.prod.outlook.com (2603:10b6:5:218::7) by DM5PR1201MB0155.namprd12.prod.outlook.com (2603:10b6:4:55::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4628.18; Fri, 22 Oct 2021 12:00:19 +0000 Received: from DM6PR12MB4107.namprd12.prod.outlook.com ([fe80::1556:93f2:3c85:3769]) by DM6PR12MB4107.namprd12.prod.outlook.com ([fe80::1556:93f2:3c85:3769%3]) with mapi id 15.20.4628.018; Fri, 22 Oct 2021 12:00:19 +0000 From: Elena Agostini To: Jerin Jacob , NBU-Contact-Thomas Monjalon CC: Jerin Jacob , dpdk-dev , Ferruh Yigit , Ajit Khaparde , Andrew Boyer , Andrew Rybchenko , Beilei Xing , "Richardson, Bruce" , Chas Williams , "Xia, Chenbo" , Ciara Loftus , Devendra Singh Rawat , Ed Czeck , Evgeny Schemeilin , Gaetan Rivet , Gagandeep Singh , Guoyang Zhou , Haiyue Wang , Harman Kalra , "heinrich.kuhn@corigine.com" , Hemant Agrawal , Hyong Youb Kim , Igor Chauskin , Igor Russkikh , Jakub Grajciar , Jasvinder Singh , Jian Wang , Jiawen Wu , Jingjing Wu , John Daley , John Miller , "John W. Linville" , "Wiles, Keith" , Kiran Kumar K , Lijun Ou , Liron Himi , NBU-Contact-longli , Marcin Wojtas , Martin Spinler , Matan Azrad , Matt Peters , Maxime Coquelin , Michal Krawczyk , "Min Hu (Connor" , Pradeep Kumar Nalla , Nithin Dabilpuram , Qiming Yang , Qi Zhang , Radha Mohan Chintakuntla , Rahul Lakkireddy , Rasesh Mody , Rosen Xu , Sachin Saxena , Satha Koteswara Rao Kottidi , Shahed Shaikh , Shai Brandes , Shepard Siegel , Somalapuram Amaranath , Somnath Kotur , Stephen Hemminger , Steven Webster , Sunil Kumar Kori , Tetsuya Mukawa , Veerasenareddy Burru , Slava Ovsiienko , Xiao Wang , Xiaoyun Wang , Yisen Zhuang , Yong Wang , Ziyang Xuan , Prasun Kapoor , "nadavh@marvell.com" , Satananda Burla , Narayana Prasad , Akhil Goyal , Ray Kinsella , Dmitry Kozlyuk , Anatoly Burakov , Cristian Dumitrescu , Honnappa Nagarahalli , =?Windows-1252?Q?Mattias_R=F6nnblom?= , "Ruifeng Wang (Arm Technology China)" , David Christensen , "Ananyev, Konstantin" , Olivier Matz , "Jayatheerthan, Jay" , Ashwin Sekhar Thalakalath Kottilveetil , Pavan Nikhilesh , David Marchand , "tom@herbertland.com" Thread-Topic: [dpdk-dev] [RFC PATCH 0/1] Dataplane Workload Accelerator library Thread-Index: AQHXxRW1f9yGB1OuYUitd/7G6vy6LKvarziAgAAHvwCABAerwg== Date: Fri, 22 Oct 2021 12:00:18 +0000 Message-ID: References: <20211019181459.1709976-1-jerinj@marvell.com> <6870595.fqHcUuC4to@thomas> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: gmail.com; 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charset="Windows-1252" Content-Transfer-Encoding: quoted-printable X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: Re: [dpdk-dev] [RFC PATCH 0/1] Dataplane Workload Accelerator library X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Tue, Oct 19, 2021 at 21:36 Jerin Jacob wrote: > On Wed, Oct 20, 2021 at 12:38 AM Thomas Monjalon wr= ote: > > > > 19/10/2021 20:14, jerinj@marvell.com: > > > Definition of Dataplane Workload Accelerator > > > -------------------------------------------- > > > Dataplane Workload Accelerator(DWA) typically contains a set of CPUs, > > > Network controllers and programmable data acceleration engines for > > > packet processing, cryptography, regex engines, baseband processing, = etc. > > > This allows DWA to offload compute/packet processing/baseband/ > > > cryptography-related workload from the host CPU to save the cost and = power. > > > Also to enable scaling the workload by adding DWAs to the Host CPU as= needed. > > > > > > Unlike other devices in DPDK, the DWA device is not fixed-function > > > due to the fact that it has CPUs and programmable HW accelerators. > > > This enables DWA personality/workload to be completely programmable. > > > Typical examples of DWA offloads are Flow/Session management, > > > Virtual switch, TLS offload, IPsec offload, l3fwd offload, etc. > > > > If I understand well, the idea is to abstract the offload > > of some stack layers in the hardware. > > Yes. It may not just HW, For expressing the complicated workloads > may need CPU and/or other HW accelerators. > > > I am not sure we should give an API for such stack layers in DPDK. > > Why not? > > > It looks to be the role of the dataplane application to finely manage > > how to use the hardware for a specific dataplane. > > It is possible with this scheme. > > > I believe the API for such layer would be either too big, or too limite= d, > > or not optimized for specific needs. > > It will be optimized for specific needs as applications ask for what to d= o? > not how to do? > > > If we really want to automate or abstract the HW/SW co-design, > > I think we should better look at compiler work like P4 or PANDA. > > The compiler stuff is very static in nature. It can address the packet > transformation > workloads. Not the ones like IPsec or baseband offload. > Another way to look at it, GPU RFC started just because you are not able > to express all the workload in P4. > That=92s not the purpose of the GPU RFC. gpudev library goal is to enhance the dialog between GPU, CPU and NIC offer= ing the possibility to: - Have DPDK aware of non-CPU memory like device memory (e.g. similarly to w= hat happened with MPI) - Hide some memory management GPU library specific implementation details - Reduce the gap between network activity and device activity (e.g. receive= /send packets directly using the device memory) - Reduce the gap between CPU activity and application-defined GPU workload - Open to the capability to interact with the GPU device, not managing it gpudev library can be easily embedded in any GPU specific application with = a relatively small effort. The application can allocate, communicate and manage the memory with the de= vice transparently through DPDK. What you are providing here is different and out of the scope of the gpudev= library: control and manage the workload submission of possibly any accelerator device, hiding a lot of implementation details within DPDK. A wrapper for accelerator devices specific libraries and I think that it=92= s too far to be realistic. As a GPU user, I don=92t want to delegate my tasks to DWA because it can=92= t be fully optimized, updated to the latest GPU specific feature, etc.. Additionally, a generic DWA won't work for a GPU: - Memory copies of DWA to CPU / CPU to DWA is latency expensive. Packets ca= n directly be received in device memory - When launching multiple processing blocks, efficiency may be compromised I don=92t actually see a real comparison between gpudev and DWA. If in the future we=92ll expose some GPU workload through the gpudev librar= y, it will be for some network specific and well-defined problems.