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Wed, 31 Jul 2024 12:51:54 +0000 Received: from DS0PR11MB7458.namprd11.prod.outlook.com ([fe80::1a9e:53a6:9603:8f79]) by DS0PR11MB7458.namprd11.prod.outlook.com ([fe80::1a9e:53a6:9603:8f79%5]) with mapi id 15.20.7807.026; Wed, 31 Jul 2024 12:51:54 +0000 From: "Ji, Kai" To: Akhil Goyal , "dev@dpdk.org" CC: "thomas@monjalon.net" , "Marchand, David" , "hemant.agrawal@nxp.com" , "anoobj@marvell.com" , "De Lara Guarch, Pablo" , "Trahe, Fiona" , "Doherty, Declan" , "matan@nvidia.com" , "g.singh@nxp.com" , "fanzhang.oss@gmail.com" , "jianjay.zhou@huawei.com" , "asomalap@amd.com" , "ruifeng.wang@arm.com" , "konstantin.v.ananyev@yandex.ru" , "Nicolau, Radu" , "ajit.khaparde@broadcom.com" , "rnagadheeraj@marvell.com" , "adwivedi@marvell.com" , "ciara.power@intel.com" Subject: Re: [PATCH] doc: announce change in crypto queue setup Thread-Topic: [PATCH] doc: announce change in crypto queue setup Thread-Index: AQHa4zxV7Fs35eXUek6bXM1JISHrEbIQyj0l Date: Wed, 31 Jul 2024 12:51:54 +0000 Message-ID: References: <20240731112037.1440890-1-gakhil@marvell.com> In-Reply-To: <20240731112037.1440890-1-gakhil@marvell.com> Accept-Language: en-GB, en-US, en-IE Content-Language: en-GB X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Acked-by: Kai Ji ________________________________ From: Akhil Goyal Sent: 31 July 2024 12:20 To: dev@dpdk.org Cc: thomas@monjalon.net ; Marchand, David ; hemant.agrawal@nxp.com ; anoobj@ma= rvell.com ; De Lara Guarch, Pablo ; Trahe, Fiona ; Doherty, Declan ; matan@nvidia.com ; g.singh@nxp.com ; fanzhang.oss@gmail.com ; jianjay.z= hou@huawei.com ; asomalap@amd.com ; ruifeng.wang@arm.com ; konstantin.v.ananyev@yande= x.ru ; Nicolau, Radu ; ajit.khaparde@broadcom.com ; rnagadheeraj@m= arvell.com ; adwivedi@marvell.com ; ciara.power@intel.com ; Akhil Goyal Subject: [PATCH] doc: announce change in crypto queue setup Certain hardware crypto PMDs may support setting up of priority to a queue pair. Hence a new parameter for priority will be added in struct rte_cryptodev_qp_conf. Signed-off-by: Akhil Goyal --- doc/guides/rel_notes/deprecation.rst | 3 +++ 1 file changed, 3 insertions(+) diff --git a/doc/guides/rel_notes/deprecation.rst b/doc/guides/rel_notes/de= precation.rst index 6948641ff6..4d114cec3e 100644 --- a/doc/guides/rel_notes/deprecation.rst +++ b/doc/guides/rel_notes/deprecation.rst @@ -125,6 +125,9 @@ Deprecation Notices This will effect the KASUMI, SNOW3G, ZUC, AESNI GCM, AESNI MB and CHACHA= POLY SW PMDs. +* cryptodev: The structure ``rte_cryptodev_qp_conf`` will be updated to ha= ve + a new parameter to set priority of that particular queue pair. + * eventdev: The single-event (non-burst) enqueue and dequeue operations, used by static inline burst enqueue and dequeue functions in ``rte_event= dev.h``, will be removed in DPDK 23.11. -- 2.25.1 --_000_DS0PR11MB7458D3FA7B5B18EE049860F281B12DS0PR11MB7458namp_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable
Acked-by: Kai Ji <kai.ji@intel.com>
From: Akhil Goyal <gakhi= l@marvell.com>
Sent: 31 July 2024 12:20
To: dev@dpdk.org <dev@dpdk.org>
Cc: thomas@monjalon.net <thomas@monjalon.net>; Marchand, David= <david.marchand@redhat.com>; hemant.agrawal@nxp.com <hemant.agraw= al@nxp.com>; anoobj@marvell.com <anoobj@marvell.com>; De Lara Guar= ch, Pablo <pablo.de.lara.guarch@intel.com>; Trahe, Fiona <fiona.trahe@intel.com>; Doherty, Declan <declan.doherty@intel.co= m>; matan@nvidia.com <matan@nvidia.com>; g.singh@nxp.com <g.sin= gh@nxp.com>; fanzhang.oss@gmail.com <fanzhang.oss@gmail.com>; jian= jay.zhou@huawei.com <jianjay.zhou@huawei.com>; asomalap@amd.com <asomalap@amd.com>; ruifeng.wang@arm.com <ruifeng.wang@arm.com>= ;; konstantin.v.ananyev@yandex.ru <konstantin.v.ananyev@yandex.ru>; N= icolau, Radu <radu.nicolau@intel.com>; ajit.khaparde@broadcom.com <= ;ajit.khaparde@broadcom.com>; rnagadheeraj@marvell.com <rnagadheeraj@= marvell.com>; adwivedi@marvell.com <adwivedi@marvell.com>; ciara.power@intel.com &= lt;ciara.power@intel.com>; Akhil Goyal <gakhil@marvell.com>
Subject: [PATCH] doc: announce change in crypto queue setup
 
Certain hardware crypto PMDs may support setting u= p
of priority to a queue pair.
Hence a new parameter for priority will be added in
struct rte_cryptodev_qp_conf.

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
---
 doc/guides/rel_notes/deprecation.rst | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/doc/guides/rel_notes/deprecation.rst b/doc/guides/rel_notes/de= precation.rst
index 6948641ff6..4d114cec3e 100644
--- a/doc/guides/rel_notes/deprecation.rst
+++ b/doc/guides/rel_notes/deprecation.rst
@@ -125,6 +125,9 @@ Deprecation Notices
   This will effect the KASUMI, SNOW3G, ZUC, AESNI GCM, AESNI MB = and CHACHAPOLY
   SW PMDs.
 
+* cryptodev: The structure ``rte_cryptodev_qp_conf`` will be updated to ha= ve
+  a new parameter to set priority of that particular queue pair.
+
 * eventdev: The single-event (non-burst) enqueue and dequeue operatio= ns,
   used by static inline burst enqueue and dequeue functions in `= `rte_eventdev.h``,
   will be removed in DPDK 23.11.
--
2.25.1

--_000_DS0PR11MB7458D3FA7B5B18EE049860F281B12DS0PR11MB7458namp_--