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b=zYvNLeTZB9V+0FW9VBFKyJKYmoDfkeoZKYJY7FsbpMK5Zk6xc860Z/7ltM1B11TDQa3aVdVnRKgKWpyRQpMEY+c/BVwBBf+WxeATA79oWr1c5Vlj0wQt6rp0p30og5fqxnwV44QBllSg3PeeBba4qfCKVf09JDkQfVqbUlbSL8Q= Received: from DU2PR08MB7287.eurprd08.prod.outlook.com (2603:10a6:10:2d6::20) by DB9PR08MB7068.eurprd08.prod.outlook.com (2603:10a6:10:2c1::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4690.16; Thu, 11 Nov 2021 07:27:46 +0000 Received: from DU2PR08MB7287.eurprd08.prod.outlook.com ([fe80::455c:4503:6b3a:1b05]) by DU2PR08MB7287.eurprd08.prod.outlook.com ([fe80::455c:4503:6b3a:1b05%8]) with mapi id 15.20.4690.019; Thu, 11 Nov 2021 07:27:46 +0000 From: Joyce Kong To: Honnappa Nagarahalli , "thomas@monjalon.net" , "david.marchand@redhat.com" , Ruifeng Wang , "konstantin.ananyev@intel.com" , "rsanford@akamai.com" , "erik.g.carrillo@intel.com" , "olivier.matz@6wind.com" , "yipeng1.wang@intel.com" , "sameh.gobriel@intel.com" , "bruce.richardson@intel.com" , "vladimir.medvedkin@intel.com" , "anatoly.burakov@intel.com" , "andrew.rybchenko@oktetlabs.ru" , "jerinj@marvell.com" , "declan.doherty@intel.com" , "ciara.power@intel.com" , "xiaoyun.li@intel.com" , "nicolas.chautru@intel.com" , "maryam.tahhan@intel.com" , "reshma.pattan@intel.com" , "cristian.dumitrescu@intel.com" CC: "dev@dpdk.org" , nd , nd Subject: RE: [PATCH v1 07/12] app/eventdev: use compiler atomic builtins for packets sync Thread-Topic: [PATCH v1 07/12] app/eventdev: use compiler atomic builtins for packets sync Thread-Index: AQHX1oliJDvtljM3f0mBKcQc1lVd/qv97X/Q Date: Thu, 11 Nov 2021 07:27:45 +0000 Message-ID: References: <20210802101847.3462-1-joyce.kong@arm.com> <20210802101847.3462-8-joyce.kong@arm.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ts-tracking-id: 1ABF66AFB808F9439C01472CDC4332A0.0 x-checkrecipientchecked: true Authentication-Results-Original: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com; 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CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(4636009)(36840700001)(46966006)(110136005)(70586007)(82310400003)(6506007)(2906002)(81166007)(83380400001)(70206006)(9686003)(356005)(7696005)(26005)(55016002)(33656002)(186003)(921005)(47076005)(5660300002)(54906003)(316002)(52536014)(8936002)(336012)(508600001)(4326008)(86362001)(36860700001)(8676002); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Nov 2021 07:27:59.5130 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d85b5499-f693-4f54-43e7-08d9a4e4c9d3 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DB5EUR03FT009.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR08MB6250 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > >=20 > > Subject: [PATCH v1 07/12] app/eventdev: use compiler atomic builtins > > for packets sync > How about the following: > app/eventdev: use compiler atomic builtins for shared data synchronizatio= n >=20 Yes, please see next version. > > > > Convert rte_atomic usages to compiler atomic built-ins for > > outstanding_pkts sync in eventdev cases. > > >=20 > >=20 > > diff --git a/app/test-eventdev/test_order_common.h b/app/test- > > eventdev/test_order_common.h index cd9d6009ec..1507265928 100644 > > --- a/app/test-eventdev/test_order_common.h > > +++ b/app/test-eventdev/test_order_common.h > > @@ -48,7 +48,7 @@ struct test_order { > > * The atomic_* is an expensive operation,Since it is a functional te= st, > > * We are using the atomic_ operation to reduce the code complexity. > > */ > > - rte_atomic64_t outstand_pkts; > > + uint64_t outstand_pkts; > > enum evt_test_result result; > > uint32_t nb_flows; > > uint64_t nb_pkts; > > @@ -95,7 +95,7 @@ static __rte_always_inline void > > order_process_stage_1(struct test_order *const t, > > struct rte_event *const ev, const uint32_t nb_flows, > > uint32_t *const expected_flow_seq, > > - rte_atomic64_t *const outstand_pkts) > > + uint64_t *const outstand_pkts) > > { > > const uint32_t flow =3D (uintptr_t)ev->mbuf % nb_flows; > > /* compare the seqn against expected value */ @@ -113,7 +113,7 > @@ > > order_process_stage_1(struct test_order *const t, > > */ > > expected_flow_seq[flow]++; > > rte_pktmbuf_free(ev->mbuf); > > - rte_atomic64_sub(outstand_pkts, 1); > > + __atomic_fetch_sub(outstand_pkts, 1, __ATOMIC_RELAXED); > > } > > > > static __rte_always_inline void > > @@ -132,7 +132,7 @@ order_process_stage_invalid(struct test_order > > *const t, > > const uint8_t port =3D w->port_id;\ > > const uint32_t nb_flows =3D t->nb_flows;\ > > uint32_t *expected_flow_seq =3D t->expected_flow_seq;\ > > - rte_atomic64_t *outstand_pkts =3D &t->outstand_pkts;\ > > + uint64_t *outstand_pkts =3D &t->outstand_pkts;\ > We could use the atomic built-in to set this? We have been doing that in > other places. Here is an address operation, so atomic built-in may not be used.=20 >=20 > > if (opt->verbose_level > 1)\ > > printf("%s(): lcore %d dev_id %d port=3D%d\n",\ > > __func__, rte_lcore_id(), dev_id, port) diff --git >=20 >