From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id EAC81594C for ; Wed, 16 Apr 2014 10:37:12 +0200 (CEST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 16 Apr 2014 01:37:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.97,870,1389772800"; d="scan'208";a="521503286" Received: from irsmsx102.ger.corp.intel.com ([163.33.3.155]) by fmsmga002.fm.intel.com with ESMTP; 16 Apr 2014 01:37:11 -0700 Received: from irsmsx105.ger.corp.intel.com (163.33.3.28) by IRSMSX102.ger.corp.intel.com (163.33.3.155) with Microsoft SMTP Server (TLS) id 14.3.123.3; Wed, 16 Apr 2014 09:36:47 +0100 Received: from irsmsx103.ger.corp.intel.com ([169.254.3.172]) by IRSMSX105.ger.corp.intel.com ([169.254.7.87]) with mapi id 14.03.0123.003; Wed, 16 Apr 2014 09:36:47 +0100 From: "De Lara Guarch, Pablo" To: Neil Horman Thread-Topic: [dpdk-dev] [PATCH v5] eal_common_cpuflags: Fix %rbx corruption, and simplify the code Thread-Index: AQHPWLr6kNy5xXGk9k2HnbFY3BnblZsT6PBw Date: Wed, 16 Apr 2014 08:36:46 +0000 Message-ID: References: <20140415145612.GE3557@hmsreliant.think-freely.org> In-Reply-To: <20140415145612.GE3557@hmsreliant.think-freely.org> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [163.33.239.181] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Cc: "dev@dpdk.org" Subject: Re: [dpdk-dev] [PATCH v5] eal_common_cpuflags: Fix %rbx corruption, and simplify the code X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Apr 2014 08:37:13 -0000 Hi Neil, > What was the value of RTE_COMPILE_TIME_CPUFLAGS when you built your libra= ry? If you added defines for flag support that are not tested for yet in t= he cpu_feature_table, that would be the error you would see I think RTE_COMPILE_TIME_CPUFLAGS=3D RTE_CPUFLAG_SSE,RTE_CPUFLAG_SSE2,RTE_CPUFLAG_S= SE3,RTE_CPUFLAG_SSSE3,RTE_CPUFLAG_SSE4_1,RTE_CPUFLAG_SSE4_2,RTE_CPUFLAG_AES= ,RTE_CPUFLAG_PCLMULQDQ,RTE_CPUFLAG_AVX For gcc_version >=3D4.6, that value is the same, of course (and all those f= lags are supported). So it has to be something else...=20 Thanks, Pablo de Lara DPDK SW Engineer -------------------------------------------------------------- Intel Shannon Limited Registered in Ireland Registered Office: Collinstown Industrial Park, Leixlip, County Kildare Reg= istered Number: 308263 Business address: Dromore House, East Park, Shannon,= Co. Clare =20