From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by dpdk.org (Postfix) with ESMTP id 84D2F678B for ; Wed, 16 Apr 2014 11:00:35 +0200 (CEST) Received: from azsmga001.ch.intel.com ([10.2.17.19]) by azsmga101.ch.intel.com with ESMTP; 16 Apr 2014 02:00:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.97,870,1389772800"; d="scan'208,217";a="419701410" Received: from irsmsx104.ger.corp.intel.com ([163.33.3.159]) by azsmga001.ch.intel.com with ESMTP; 16 Apr 2014 02:00:32 -0700 Received: from irsmsx105.ger.corp.intel.com (163.33.3.28) by IRSMSX104.ger.corp.intel.com (163.33.3.159) with Microsoft SMTP Server (TLS) id 14.3.123.3; Wed, 16 Apr 2014 09:58:32 +0100 Received: from irsmsx103.ger.corp.intel.com ([169.254.3.172]) by IRSMSX105.ger.corp.intel.com ([169.254.7.87]) with mapi id 14.03.0123.003; Wed, 16 Apr 2014 09:58:32 +0100 From: "De Lara Guarch, Pablo" To: Neil Horman Thread-Topic: RE: [dpdk-dev] [PATCH v5] eal_common_cpuflags: Fix %rbx corruption, and simplify the code Thread-Index: Ac9ZUfEzMeHD/JiaToK9LxwiXmf9bg== Date: Wed, 16 Apr 2014 08:58:31 +0000 Message-ID: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [163.33.239.181] MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable X-Content-Filtered-By: Mailman/MimeDel 2.1.15 Cc: "dev@dpdk.org" Subject: Re: [dpdk-dev] [PATCH v5] eal_common_cpuflags: Fix %rbx corruption, and simplify the code X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Apr 2014 09:00:36 -0000 Hi Neil, >> What was the value of RTE_COMPILE_TIME_CPUFLAGS when you built your libr= ary? If you added defines for flag support that are not tested for yet in = the cpu_feature_table, that would be the error you would see I think >RTE_COMPILE_TIME_CPUFLAGS=3D >RTE_CPUFLAG_SSE,RTE_CPUFLAG_SSE2,RTE_CPUFLAG= _SSE3,RTE_CPUFLAG_SSSE3,RTE_CPUFLAG_SSE4_1,RTE_CPUFLAG_SSE4_2,RTE_CPUFLAG_A= ES,RTE_CPUFLAG_PCLMULQDQ,RTE_CPUFLAG_AVX >For gcc_version >=3D4.6, that value is the same, of course (and all those = flags are supported). So it has to be something else... Silly me, I just saw what was hapenning. There are two missing brackets in = the loop: for (i =3D 0; i < sizeof(compile_time_flags)/sizeof(compile_time_flags[0]);= i++) { ret =3D rte_cpu_get_flag_enabled(compile_time_flags[i]); if (ret < 0) { fprintf(stderr, "ERROR: CPU feature flag lookup failed with error %d\n", ret); exit(1); } if (!ret) { fprintf(stderr, "ERROR: This system does not support \"%s\".\n" "Please check that RTE_MACHINE is set correctly.\n", cpu_feature_table[compile_time_flags[i]].name); exit(1); } } So, basically, "i" was size of the array +1 after the loop and only the ret= urn value was being checked for the last item. Not sure why higher versions= of gcc do not catch this. Thanks, Pablo de Lara DPDK SW Engineer -------------------------------------------------------------- Intel Shannon Limited Registered in Ireland Registered Office: Collinstown Industrial Park, Leixlip, County Kildare Reg= istered Number: 308263 Business address: Dromore House, East Park, Shannon,= Co. Clare