From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id E60E010C52 for ; Wed, 21 Dec 2016 15:55:43 +0100 (CET) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga105.jf.intel.com with ESMTP; 21 Dec 2016 06:55:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,384,1477983600"; d="scan'208";a="1074854089" Received: from irsmsx154.ger.corp.intel.com ([163.33.192.96]) by orsmga001.jf.intel.com with ESMTP; 21 Dec 2016 06:55:41 -0800 Received: from irsmsx108.ger.corp.intel.com ([169.254.11.173]) by IRSMSX154.ger.corp.intel.com ([169.254.12.128]) with mapi id 14.03.0248.002; Wed, 21 Dec 2016 14:55:41 +0000 From: "De Lara Guarch, Pablo" To: "zbigniew.bodek@caviumnetworks.com" , "jerin.jacob@caviumnetworks.com" CC: "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH v2 06/12] crypto/armv8: add PMD optimized for ARMv8 processors Thread-Index: AQHST+dBRXdgVYkjMk2pTxnrUnN6V6ESkl9g Date: Wed, 21 Dec 2016 14:55:40 +0000 Message-ID: References: <1480851219-45071-1-git-send-email-zbigniew.bodek@caviumnetworks.com> <1481077985-4224-1-git-send-email-zbigniew.bodek@caviumnetworks.com> <1481077985-4224-7-git-send-email-zbigniew.bodek@caviumnetworks.com> In-Reply-To: <1481077985-4224-7-git-send-email-zbigniew.bodek@caviumnetworks.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZjM2YmI3OTgtMDc5MS00ZTU2LWI5OWUtYzQ3ZDExYjg1NzVlIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6ImVZcU5pM2xidEhjVVFTc2ZYbmNVK1pwNmJ3QVB3d2NZRXk5QnMxdFc0WVE9In0= x-ctpclassification: CTP_IC x-originating-ip: [163.33.239.182] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2 06/12] crypto/armv8: add PMD optimized for ARMv8 processors X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 Dec 2016 14:55:45 -0000 > -----Original Message----- > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of > zbigniew.bodek@caviumnetworks.com > Sent: Wednesday, December 07, 2016 2:33 AM > To: De Lara Guarch, Pablo; jerin.jacob@caviumnetworks.com > Cc: dev@dpdk.org; Zbigniew Bodek > Subject: [dpdk-dev] [PATCH v2 06/12] crypto/armv8: add PMD optimized > for ARMv8 processors >=20 > From: Zbigniew Bodek >=20 > This patch introduces crypto poll mode driver > using ARMv8 cryptographic extensions. > CPU compatibility with this driver is detected in > run-time and virtual crypto device will not be > created if CPU doesn't provide: > AES, SHA1, SHA2 and NEON. >=20 > This PMD is optimized to provide performance boost > for chained crypto operations processing, > such as encryption + HMAC generation, > decryption + HMAC validation. In particular, > cipher only or hash only operations are > not provided. >=20 > The driver currently supports AES-128-CBC > in combination with: > SHA256 MAC, SHA256 HMAC and SHA1 HMAC and relies > on the low-level assembly code. >=20 > This patch adds driver's code only and does > not include it in the build system. >=20 > Signed-off-by: Zbigniew Bodek > --- > drivers/crypto/armv8/Makefile | 72 ++ > drivers/crypto/armv8/asm/include/rte_armv8_defs.h | 80 ++ > drivers/crypto/armv8/rte_armv8_pmd.c | 915 > ++++++++++++++++++++++ > drivers/crypto/armv8/rte_armv8_pmd_ops.c | 390 +++++++++ > drivers/crypto/armv8/rte_armv8_pmd_private.h | 210 +++++ > drivers/crypto/armv8/rte_armv8_pmd_version.map | 3 + > 6 files changed, 1670 insertions(+) > create mode 100644 drivers/crypto/armv8/Makefile > create mode 100644 > drivers/crypto/armv8/asm/include/rte_armv8_defs.h > create mode 100644 drivers/crypto/armv8/rte_armv8_pmd.c > create mode 100644 drivers/crypto/armv8/rte_armv8_pmd_ops.c > create mode 100644 drivers/crypto/armv8/rte_armv8_pmd_private.h > create mode 100644 drivers/crypto/armv8/rte_armv8_pmd_version.map >=20 ... > diff --git a/drivers/crypto/armv8/asm/include/rte_armv8_defs.h > b/drivers/crypto/armv8/asm/include/rte_armv8_defs.h > new file mode 100644 > index 0000000..ea05495 > --- /dev/null > +++ b/drivers/crypto/armv8/asm/include/rte_armv8_defs.h > @@ -0,0 +1,80 @@ ... > + > +#ifndef _RTE_ARMV8_DEFS_H_ > +#define _RTE_ARMV8_DEFS_H_ > + > +struct crypto_arg { > + struct { > + uint8_t *key; > + uint8_t *iv; > + } cipher; Remove unnecessary tab above. > + struct { > + struct { > + uint8_t *key; > + uint8_t *i_key_pad; > + uint8_t *o_key_pad; > + } hmac; > + } digest; > +}; ... > diff --git a/drivers/crypto/armv8/rte_armv8_pmd.c > b/drivers/crypto/armv8/rte_armv8_pmd.c > new file mode 100644 > index 0000000..0410bb0 > --- /dev/null > +++ b/drivers/crypto/armv8/rte_armv8_pmd.c > + * 3D array type for ARM Combined Mode crypto functions pointers. > + * CRYPTO_CIPHER_MAX: max cipher ID number > + * CRYPTO_AUTH_MAX: max auth ID number > + * CRYPTO_CIPHER_KEYLEN_MAX: max key length ID number > + */ > +typedef const crypto_func_t > +crypto_func_tbl_t[CRYPTO_CIPHER_MAX][CRYPTO_AUTH_MAX][CRYPTO_ > CIPHER_KEYLEN_MAX]; > + > +/* Evaluate to key length definition */ > +#define KEYL(keyl) (ARMV8_CRYPTO_CIPHER_KEYLEN_ > ## keyl) I don't think a tab is necessary here after define (happens on other parts) > + > +/* Local aliases for supported ciphers */ > +#define CIPH_AES_CBC RTE_CRYPTO_CIPHER_AES_CBC > +/* Local aliases for supported hashes */ > +#define AUTH_SHA1_HMAC > RTE_CRYPTO_AUTH_SHA1_HMAC > +#define AUTH_SHA256 RTE_CRYPTO_AUTH_SHA256 > +#define AUTH_SHA256_HMAC RTE_CRYPTO_AUTH_SHA256_HMAC ... > diff --git a/drivers/crypto/armv8/rte_armv8_pmd_ops.c > b/drivers/crypto/armv8/rte_armv8_pmd_ops.c > new file mode 100644 > index 0000000..0f768f4 > --- /dev/null > +++ b/drivers/crypto/armv8/rte_armv8_pmd_ops.c ... > + { /* AES CBC */ > + .op =3D RTE_CRYPTO_OP_TYPE_SYMMETRIC, > + {.sym =3D { > + .xform_type =3D > RTE_CRYPTO_SYM_XFORM_CIPHER, > + {.cipher =3D { > + .algo =3D > RTE_CRYPTO_CIPHER_AES_CBC, > + .block_size =3D 16, > + .key_size =3D { > + .min =3D 16, > + .max =3D 32, > + .increment =3D 8 >>From what I read, this PMD only supports AES-128-CBC. If that's right, then key_size should be .min =3D 16, .max =3D 16, .increme= nt =3D 0.