From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id CA2E72FDD for ; Tue, 4 Apr 2017 17:11:48 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1491318710; x=1522854710; h=from:to:cc:subject:date:message-id:references: in-reply-to:content-transfer-encoding:mime-version; bh=iG9ZB+16M8H/BV/v5EIUuQqD9XbfglJIegxKY5h505U=; b=Qd0GZeF/TtNS/C1o51F9ggRxJcYMzyMrOAMk5y5e/OfsM3/a0oZNaMsx YSfNm1TGtZta1ECmTKRHwQIOSZSZNQ==; Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Apr 2017 08:11:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,275,1486454400"; d="scan'208";a="73451102" Received: from irsmsx106.ger.corp.intel.com ([163.33.3.31]) by orsmga004.jf.intel.com with ESMTP; 04 Apr 2017 08:11:29 -0700 Received: from irsmsx108.ger.corp.intel.com ([169.254.11.239]) by IRSMSX106.ger.corp.intel.com ([169.254.8.202]) with mapi id 14.03.0319.002; Tue, 4 Apr 2017 16:11:28 +0100 From: "De Lara Guarch, Pablo" To: "akhil.goyal@nxp.com" , "dev@dpdk.org" CC: "Doherty, Declan" Thread-Topic: [PATCH] test/test: improve dequeue logic for crypto operation Thread-Index: AQHSrGiQ8S/19zWdykKO0dOqkuSp+KG1UPrQ Date: Tue, 4 Apr 2017 15:11:27 +0000 Message-ID: References: <20170403105302.9685-1-akhil.goyal@nxp.com> In-Reply-To: <20170403105302.9685-1-akhil.goyal@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMjYwNTk3NTctOGQ5YS00OGRjLTliN2MtODZkYzEzMDdkMjUwIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6ImZOaXZLXC9ndlFqUjlSS0I0WGhPRFJiTjlnQkp6Q1VnXC96dnN3WFBSUEZ2OD0ifQ== x-ctpclassification: CTP_IC x-originating-ip: [163.33.239.180] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH] test/test: improve dequeue logic for crypto operation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 04 Apr 2017 15:11:50 -0000 Hi Akhil, > -----Original Message----- > From: akhil.goyal@nxp.com [mailto:akhil.goyal@nxp.com] > Sent: Monday, April 03, 2017 11:53 AM > To: dev@dpdk.org > Cc: Doherty, Declan; De Lara Guarch, Pablo; Akhil Goyal > Subject: [PATCH] test/test: improve dequeue logic for crypto operation >=20 > From: Akhil Goyal >=20 > While enqueue/dequeue operations in test_perf_aes_sha, > the underlying implementation may not be able to dequeue > the same number of buffers as enqueued. So, it may be > necessary to perform more dequeue operations if the gap > is more than pparams->burst_size * NUM_MBUF_SETS. >=20 > Other algos may also need to update the logic if required. >=20 In which way this patch improves the dequeue logic? Is it improving the performance somehow? From what I see, it is unlikely th= at you are going to experience the problem, as the internal ring is PERF_NUM_OPS_INFLIGHT, whic= h is 128, higher than pparams->burst_size * NUM_MBUF_SETS, which is 256. And even if you do meet that problem, then you would be reusing mbufs, but that is OK as we are not verifying the output. Thanks, Pablo