From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <pablo.de.lara.guarch@intel.com>
Received: from mga09.intel.com (mga09.intel.com [134.134.136.24])
 by dpdk.org (Postfix) with ESMTP id 92EE81BB2A
 for <dev@dpdk.org>; Fri,  6 Jul 2018 19:11:14 +0200 (CEST)
X-Amp-Result: SKIPPED(no attachment in message)
X-Amp-File-Uploaded: False
Received: from fmsmga002.fm.intel.com ([10.253.24.26])
 by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;
 06 Jul 2018 10:11:13 -0700
X-ExtLoop1: 1
X-IronPort-AV: E=Sophos;i="5.51,317,1526367600"; d="scan'208";a="64770079"
Received: from irsmsx153.ger.corp.intel.com ([163.33.192.75])
 by fmsmga002.fm.intel.com with ESMTP; 06 Jul 2018 10:11:12 -0700
Received: from irsmsx108.ger.corp.intel.com ([169.254.11.139]) by
 IRSMSX153.ger.corp.intel.com ([169.254.9.210]) with mapi id 14.03.0319.002;
 Fri, 6 Jul 2018 18:11:11 +0100
From: "De Lara Guarch, Pablo" <pablo.de.lara.guarch@intel.com>
To: "Wang, Yipeng1" <yipeng1.wang@intel.com>
CC: "dev@dpdk.org" <dev@dpdk.org>, "Richardson, Bruce"
 <bruce.richardson@intel.com>, "honnappa.nagarahalli@arm.com"
 <honnappa.nagarahalli@arm.com>, "vguvva@caviumnetworks.com"
 <vguvva@caviumnetworks.com>, "brijesh.s.singh@gmail.com"
 <brijesh.s.singh@gmail.com>
Thread-Topic: [PATCH v2 2/6] hash: add read and write concurrency support
Thread-Index: AQHUD9/aG5UjmtFCA0OYEZNEwlHLFaSCc/xQ
Date: Fri, 6 Jul 2018 17:11:11 +0000
Message-ID: <E115CCD9D858EF4F90C690B0DCB4D8977F8E6A9D@IRSMSX108.ger.corp.intel.com>
References: <1528455078-328182-1-git-send-email-yipeng1.wang@intel.com>
 <1530275097-123488-1-git-send-email-yipeng1.wang@intel.com>
 <1530275097-123488-3-git-send-email-yipeng1.wang@intel.com>
In-Reply-To: <1530275097-123488-3-git-send-email-yipeng1.wang@intel.com>
Accept-Language: en-US
Content-Language: en-US
X-MS-Has-Attach: 
X-MS-TNEF-Correlator: 
x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiN2IzZDk4NDAtYWYyZi00YjJmLTgwZDEtMDI0Yjk5ZTBhMWVmIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiVHc1enZGNG5tYzg5ZE9JNE1uXC8zM3RNdjZSVEN6TWt4UlJHcFhJYndwYUptbm16TmthcTI5NjY4Q29zQWRjTnIifQ==
x-ctpclassification: CTP_NT
dlp-product: dlpe-windows
dlp-version: 11.0.200.100
dlp-reaction: no-action
x-originating-ip: [163.33.239.180]
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
MIME-Version: 1.0
Subject: Re: [dpdk-dev] [PATCH v2 2/6] hash: add read and write concurrency
	support
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.15
Precedence: list
List-Id: DPDK patches and discussions <dev.dpdk.org>
List-Unsubscribe: <https://mails.dpdk.org/options/dev>,
 <mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://mails.dpdk.org/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <https://mails.dpdk.org/listinfo/dev>,
 <mailto:dev-request@dpdk.org?subject=subscribe>
X-List-Received-Date: Fri, 06 Jul 2018 17:11:15 -0000



> -----Original Message-----
> From: Wang, Yipeng1
> Sent: Friday, June 29, 2018 1:25 PM
> To: De Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>
> Cc: dev@dpdk.org; Wang, Yipeng1 <yipeng1.wang@intel.com>; Richardson,
> Bruce <bruce.richardson@intel.com>; honnappa.nagarahalli@arm.com;
> vguvva@caviumnetworks.com; brijesh.s.singh@gmail.com
> Subject: [PATCH v2 2/6] hash: add read and write concurrency support
>=20
> The existing implementation of librte_hash does not support read-write
> concurrency. This commit implements read-write safety using rte_rwlock an=
d
> rte_rwlock TM version if hardware transactional memory is available.
>=20
> Both multi-writer and read-write concurrency is protected by rte_rwlock n=
ow.
> The x86 specific header file is removed since the x86 specific RTM functi=
on is not
> called directly by rte hash now.
>=20
> Signed-off-by: Yipeng Wang <yipeng1.wang@intel.com>
> ---
>  lib/librte_hash/meson.build           |   1 -
>  lib/librte_hash/rte_cuckoo_hash.c     | 507 ++++++++++++++++++++++------=
------
>  lib/librte_hash/rte_cuckoo_hash.h     |  18 +-
>  lib/librte_hash/rte_cuckoo_hash_x86.h | 164 -----------
>  lib/librte_hash/rte_hash.h            |   3 +
>  5 files changed, 338 insertions(+), 355 deletions(-)  delete mode 100644
> lib/librte_hash/rte_cuckoo_hash_x86.h
>=20

...

> --- a/lib/librte_hash/rte_cuckoo_hash.c
> +++ b/lib/librte_hash/rte_cuckoo_hash.c
> @@ -31,9 +31,6 @@

...

> +	if (h->multi_writer_support) {
> +		h->readwrite_lock =3D rte_malloc(NULL, sizeof(rte_rwlock_t),
>  							LCORE_CACHE_SIZE);

I think LCORE_CACHE_SIZE should be RTE_CACHE_LINE_SIZE (same value, but dif=
ferent meaning).

> -			rte_spinlock_init(h->multiwriter_lock);
> -		}

...

> +
> +	/* Didnt' find a match, so get a new slot for storing the new key */

Typo: Didn't

> +	if (h->multi_writer_support) {
>  		lcore_id =3D rte_lcore_id();
>  		cached_free_slots =3D &h->local_free_slots[lcore_id];