From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id 0E3C42BB1 for ; Fri, 3 May 2019 05:30:35 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 02 May 2019 20:30:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,424,1549958400"; d="scan'208";a="145618037" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by fmsmga008.fm.intel.com with ESMTP; 02 May 2019 20:30:34 -0700 Received: from fmsmsx155.amr.corp.intel.com (10.18.116.71) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.408.0; Thu, 2 May 2019 20:30:33 -0700 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by FMSMSX155.amr.corp.intel.com (10.18.116.71) with Microsoft SMTP Server (TLS) id 14.3.408.0; Thu, 2 May 2019 20:30:33 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.129]) by shsmsx102.ccr.corp.intel.com ([169.254.2.249]) with mapi id 14.03.0415.000; Fri, 3 May 2019 11:30:31 +0800 From: "Wang, Haiyue" To: "Zhang, Qi Z" , "dev@dpdk.org" , "Lu, Wenzhuo" Thread-Topic: [PATCH v1] net/ice: add link-up and link-down functions Thread-Index: AQHU/yS37pWp5McO10O2J6n5f/OynKZU8IOAgAPQrdA= Date: Fri, 3 May 2019 03:30:31 +0000 Message-ID: References: <1556608319-5135-1-git-send-email-haiyue.wang@intel.com> <039ED4275CED7440929022BC67E706115337A0F2@SHSMSX103.ccr.corp.intel.com> In-Reply-To: <039ED4275CED7440929022BC67E706115337A0F2@SHSMSX103.ccr.corp.intel.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiODRjNmVmYzAtMjRjYS00NzIxLWJlMTctZTJmYTlkZjc0ZDQwIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiYnZkN1lKUCtVbk93Njc3bDVFVUd0cHdlbVQ4VWE0cWdFbk0xbk90TTJVS3puZ2dvN0xjdVBWV2ZUcWFyZzAwNSJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v1] net/ice: add link-up and link-down functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 03 May 2019 03:30:36 -0000 > -----Original Message----- > From: Zhang, Qi Z > Sent: Wednesday, May 1, 2019 09:09 > To: Wang, Haiyue ; dev@dpdk.org; Lu, Wenzhuo > > Subject: RE: [PATCH v1] net/ice: add link-up and link-down functions >=20 >=20 >=20 > > -----Original Message----- > > From: Wang, Haiyue > > Sent: Tuesday, April 30, 2019 3:12 PM > > To: dev@dpdk.org; Zhang, Qi Z ; Lu, Wenzhuo > > > > Cc: Wang, Haiyue > > Subject: [PATCH v1] net/ice: add link-up and link-down functions > > > > Support link up and down functions for ice, and when stop the ice, > > makes the link down also. > > > > Signed-off-by: Haiyue Wang > > --- > > drivers/net/ice/ice_ethdev.c | 83 > > ++++++++++++++++++++++++++++++++++++++++++++ > > 1 file changed, 83 insertions(+) > > > > diff --git a/drivers/net/ice/ice_ethdev.c > > b/drivers/net/ice/ice_ethdev.c index > > 1f06a2c..8f58150 100644 > > --- a/drivers/net/ice/ice_ethdev.c > > +++ b/drivers/net/ice/ice_ethdev.c > > @@ -32,6 +32,9 @@ static void ice_dev_info_get(struct rte_eth_dev *dev, > > struct rte_eth_dev_info *dev_info); static int > > ice_link_update(struct rte_eth_dev *dev, > > int wait_to_complete); > > +static int ice_dev_set_link_up(struct rte_eth_dev *dev); static int > > +ice_dev_set_link_down(struct rte_eth_dev *dev); > > + > > static int ice_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); > > static int ice_vlan_offload_set(struct rte_eth_dev *dev, int mask); > > static int ice_vlan_tpid_set(struct rte_eth_dev *dev, @@ -94,6 +97,8 > > @@ static const struct eth_dev_ops ice_eth_dev_ops =3D { > > .dev_stop =3D ice_dev_stop, > > .dev_close =3D ice_dev_close, > > .dev_reset =3D ice_dev_reset, > > + .dev_set_link_up =3D ice_dev_set_link_up, > > + .dev_set_link_down =3D ice_dev_set_link_down, > > .rx_queue_start =3D ice_rx_queue_start, > > .rx_queue_stop =3D ice_rx_queue_stop, > > .tx_queue_start =3D ice_tx_queue_start, > > @@ -1541,6 +1546,9 @@ ice_dev_stop(struct rte_eth_dev *dev) > > /* Clear all queues and release mbufs */ > > ice_clear_queues(dev); > > > > + /* Set link down */ >=20 > The comment looks redundant > Same for the comment for ice_pf_disable_irq0 and ice_dev_set_link_up at > below. >=20 I see, this is from i40e code style. like i40e_dev_stop. :) Will make the c= ode clean next version. > > + ice_dev_set_link_down(dev); > > + > > /* Clean datapath event and queue/vec mapping */ > > rte_intr_efd_disable(intr_handle); > > if (intr_handle->intr_vec) { > > @@ -1562,10 +1570,14 @@ ice_dev_close(struct rte_eth_dev *dev) > > /* release all queue resource */ > > ice_free_queues(dev); > > > > + /* Disable interrupt */ > > + ice_pf_disable_irq0(hw); >=20 > It's better to add some explanation here. why we need this. OK, will be in v2 patch. >=20 > > + > > ice_res_pool_destroy(&pf->msix_pool); > > ice_release_vsi(pf->main_vsi); > > ice_sched_cleanup_all(hw); > > rte_free(hw->port_info); > > + hw->port_info =3D NULL; > > ice_shutdown_all_ctrlq(hw); > > } > > > > @@ -1936,6 +1948,9 @@ ice_dev_start(struct rte_eth_dev *dev) > > if (ret !=3D ICE_SUCCESS) > > PMD_DRV_LOG(WARNING, "Fail to set phy mask"); > > > > + /* Set link up */ > > + ice_dev_set_link_up(dev); > > + > > /* Call get_link_info aq commond to enable/disable LSE */ > > ice_link_update(dev, 0); > > > > @@ -2218,6 +2233,74 @@ ice_link_update(struct rte_eth_dev *dev, > > __rte_unused int wait_to_complete) > > return 0; > > } > > > > +/* Force the physical link state by getting the current PHY > > +capabilities from > > + * hardware and setting the PHY config based on the determined > > +capabilities. If > > + * link changes, link event will be triggered because both the Enable > > +Automatic > > + * Link Update and LESM Enable bits are set when setting the PHY > > capabilities. > > + */ > > +static enum ice_status > > +ice_force_phys_link_state(struct ice_hw *hw, bool link_up) { > > + struct ice_aqc_set_phy_cfg_data cfg =3D { 0 }; > > + struct ice_aqc_get_phy_caps_data *pcaps; > > + struct ice_port_info *pi; > > + enum ice_status status; > > + > > + if (!hw || !hw->port_info) > > + return ICE_ERR_PARAM; > > + > > + pi =3D hw->port_info; > > + > > + pcaps =3D (struct ice_aqc_get_phy_caps_data *) > > + ice_malloc(hw, sizeof(*pcaps)); > > + if (!pcaps) > > + return ICE_ERR_NO_MEMORY; > > + > > + status =3D ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_SW_CFG, > pcaps, > > + NULL); > > + if (status) > > + goto out; > > + > > + /* No change in link */ > > + if (link_up =3D=3D !!(pcaps->caps & ICE_AQC_PHY_EN_LINK) && > > + link_up =3D=3D !!(pi->phy.link_info.link_info & ICE_AQ_LINK_UP)) > > + goto out; > > + > > + cfg.phy_type_low =3D pcaps->phy_type_low; > > + cfg.phy_type_high =3D pcaps->phy_type_high; > > + cfg.caps =3D pcaps->caps | ICE_AQ_PHY_ENA_AUTO_LINK_UPDT; > > + cfg.low_power_ctrl =3D pcaps->low_power_ctrl; > > + cfg.eee_cap =3D pcaps->eee_cap; > > + cfg.eeer_value =3D pcaps->eeer_value; > > + cfg.link_fec_opt =3D pcaps->link_fec_options; > > + if (link_up) > > + cfg.caps |=3D ICE_AQ_PHY_ENA_LINK; > > + else > > + cfg.caps &=3D ~ICE_AQ_PHY_ENA_LINK; > > + > > + status =3D ice_aq_set_phy_cfg(hw, pi->lport, &cfg, NULL); > > + > > +out: > > + ice_free(hw, pcaps); > > + return status; > > +} > > + > > +static int > > +ice_dev_set_link_up(struct rte_eth_dev *dev) { > > + struct ice_hw *hw =3D ICE_DEV_PRIVATE_TO_HW(dev->data- > >dev_private); > > + > > + return ice_force_phys_link_state(hw, true); } > > + > > +static int > > +ice_dev_set_link_down(struct rte_eth_dev *dev) { > > + struct ice_hw *hw =3D ICE_DEV_PRIVATE_TO_HW(dev->data- > >dev_private); > > + > > + return ice_force_phys_link_state(hw, false); } > > + > > static int > > ice_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) { > > -- > > 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id C1DC8A0AC5 for ; Fri, 3 May 2019 05:30:38 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id EEEE02C54; Fri, 3 May 2019 05:30:37 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id 0E3C42BB1 for ; Fri, 3 May 2019 05:30:35 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 02 May 2019 20:30:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,424,1549958400"; d="scan'208";a="145618037" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by fmsmga008.fm.intel.com with ESMTP; 02 May 2019 20:30:34 -0700 Received: from fmsmsx155.amr.corp.intel.com (10.18.116.71) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.408.0; Thu, 2 May 2019 20:30:33 -0700 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by FMSMSX155.amr.corp.intel.com (10.18.116.71) with Microsoft SMTP Server (TLS) id 14.3.408.0; Thu, 2 May 2019 20:30:33 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.129]) by shsmsx102.ccr.corp.intel.com ([169.254.2.249]) with mapi id 14.03.0415.000; Fri, 3 May 2019 11:30:31 +0800 From: "Wang, Haiyue" To: "Zhang, Qi Z" , "dev@dpdk.org" , "Lu, Wenzhuo" Thread-Topic: [PATCH v1] net/ice: add link-up and link-down functions Thread-Index: AQHU/yS37pWp5McO10O2J6n5f/OynKZU8IOAgAPQrdA= Date: Fri, 3 May 2019 03:30:31 +0000 Message-ID: References: <1556608319-5135-1-git-send-email-haiyue.wang@intel.com> <039ED4275CED7440929022BC67E706115337A0F2@SHSMSX103.ccr.corp.intel.com> In-Reply-To: <039ED4275CED7440929022BC67E706115337A0F2@SHSMSX103.ccr.corp.intel.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiODRjNmVmYzAtMjRjYS00NzIxLWJlMTctZTJmYTlkZjc0ZDQwIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiYnZkN1lKUCtVbk93Njc3bDVFVUd0cHdlbVQ4VWE0cWdFbk0xbk90TTJVS3puZ2dvN0xjdVBWV2ZUcWFyZzAwNSJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v1] net/ice: add link-up and link-down functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Message-ID: <20190503033031._xpU5vF5AdGXZDZBhKacolnqgn0puOxb355KB8Yi8ho@z> > -----Original Message----- > From: Zhang, Qi Z > Sent: Wednesday, May 1, 2019 09:09 > To: Wang, Haiyue ; dev@dpdk.org; Lu, Wenzhuo > > Subject: RE: [PATCH v1] net/ice: add link-up and link-down functions >=20 >=20 >=20 > > -----Original Message----- > > From: Wang, Haiyue > > Sent: Tuesday, April 30, 2019 3:12 PM > > To: dev@dpdk.org; Zhang, Qi Z ; Lu, Wenzhuo > > > > Cc: Wang, Haiyue > > Subject: [PATCH v1] net/ice: add link-up and link-down functions > > > > Support link up and down functions for ice, and when stop the ice, > > makes the link down also. > > > > Signed-off-by: Haiyue Wang > > --- > > drivers/net/ice/ice_ethdev.c | 83 > > ++++++++++++++++++++++++++++++++++++++++++++ > > 1 file changed, 83 insertions(+) > > > > diff --git a/drivers/net/ice/ice_ethdev.c > > b/drivers/net/ice/ice_ethdev.c index > > 1f06a2c..8f58150 100644 > > --- a/drivers/net/ice/ice_ethdev.c > > +++ b/drivers/net/ice/ice_ethdev.c > > @@ -32,6 +32,9 @@ static void ice_dev_info_get(struct rte_eth_dev *dev, > > struct rte_eth_dev_info *dev_info); static int > > ice_link_update(struct rte_eth_dev *dev, > > int wait_to_complete); > > +static int ice_dev_set_link_up(struct rte_eth_dev *dev); static int > > +ice_dev_set_link_down(struct rte_eth_dev *dev); > > + > > static int ice_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); > > static int ice_vlan_offload_set(struct rte_eth_dev *dev, int mask); > > static int ice_vlan_tpid_set(struct rte_eth_dev *dev, @@ -94,6 +97,8 > > @@ static const struct eth_dev_ops ice_eth_dev_ops =3D { > > .dev_stop =3D ice_dev_stop, > > .dev_close =3D ice_dev_close, > > .dev_reset =3D ice_dev_reset, > > + .dev_set_link_up =3D ice_dev_set_link_up, > > + .dev_set_link_down =3D ice_dev_set_link_down, > > .rx_queue_start =3D ice_rx_queue_start, > > .rx_queue_stop =3D ice_rx_queue_stop, > > .tx_queue_start =3D ice_tx_queue_start, > > @@ -1541,6 +1546,9 @@ ice_dev_stop(struct rte_eth_dev *dev) > > /* Clear all queues and release mbufs */ > > ice_clear_queues(dev); > > > > + /* Set link down */ >=20 > The comment looks redundant > Same for the comment for ice_pf_disable_irq0 and ice_dev_set_link_up at > below. >=20 I see, this is from i40e code style. like i40e_dev_stop. :) Will make the c= ode clean next version. > > + ice_dev_set_link_down(dev); > > + > > /* Clean datapath event and queue/vec mapping */ > > rte_intr_efd_disable(intr_handle); > > if (intr_handle->intr_vec) { > > @@ -1562,10 +1570,14 @@ ice_dev_close(struct rte_eth_dev *dev) > > /* release all queue resource */ > > ice_free_queues(dev); > > > > + /* Disable interrupt */ > > + ice_pf_disable_irq0(hw); >=20 > It's better to add some explanation here. why we need this. OK, will be in v2 patch. >=20 > > + > > ice_res_pool_destroy(&pf->msix_pool); > > ice_release_vsi(pf->main_vsi); > > ice_sched_cleanup_all(hw); > > rte_free(hw->port_info); > > + hw->port_info =3D NULL; > > ice_shutdown_all_ctrlq(hw); > > } > > > > @@ -1936,6 +1948,9 @@ ice_dev_start(struct rte_eth_dev *dev) > > if (ret !=3D ICE_SUCCESS) > > PMD_DRV_LOG(WARNING, "Fail to set phy mask"); > > > > + /* Set link up */ > > + ice_dev_set_link_up(dev); > > + > > /* Call get_link_info aq commond to enable/disable LSE */ > > ice_link_update(dev, 0); > > > > @@ -2218,6 +2233,74 @@ ice_link_update(struct rte_eth_dev *dev, > > __rte_unused int wait_to_complete) > > return 0; > > } > > > > +/* Force the physical link state by getting the current PHY > > +capabilities from > > + * hardware and setting the PHY config based on the determined > > +capabilities. If > > + * link changes, link event will be triggered because both the Enable > > +Automatic > > + * Link Update and LESM Enable bits are set when setting the PHY > > capabilities. > > + */ > > +static enum ice_status > > +ice_force_phys_link_state(struct ice_hw *hw, bool link_up) { > > + struct ice_aqc_set_phy_cfg_data cfg =3D { 0 }; > > + struct ice_aqc_get_phy_caps_data *pcaps; > > + struct ice_port_info *pi; > > + enum ice_status status; > > + > > + if (!hw || !hw->port_info) > > + return ICE_ERR_PARAM; > > + > > + pi =3D hw->port_info; > > + > > + pcaps =3D (struct ice_aqc_get_phy_caps_data *) > > + ice_malloc(hw, sizeof(*pcaps)); > > + if (!pcaps) > > + return ICE_ERR_NO_MEMORY; > > + > > + status =3D ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_SW_CFG, > pcaps, > > + NULL); > > + if (status) > > + goto out; > > + > > + /* No change in link */ > > + if (link_up =3D=3D !!(pcaps->caps & ICE_AQC_PHY_EN_LINK) && > > + link_up =3D=3D !!(pi->phy.link_info.link_info & ICE_AQ_LINK_UP)) > > + goto out; > > + > > + cfg.phy_type_low =3D pcaps->phy_type_low; > > + cfg.phy_type_high =3D pcaps->phy_type_high; > > + cfg.caps =3D pcaps->caps | ICE_AQ_PHY_ENA_AUTO_LINK_UPDT; > > + cfg.low_power_ctrl =3D pcaps->low_power_ctrl; > > + cfg.eee_cap =3D pcaps->eee_cap; > > + cfg.eeer_value =3D pcaps->eeer_value; > > + cfg.link_fec_opt =3D pcaps->link_fec_options; > > + if (link_up) > > + cfg.caps |=3D ICE_AQ_PHY_ENA_LINK; > > + else > > + cfg.caps &=3D ~ICE_AQ_PHY_ENA_LINK; > > + > > + status =3D ice_aq_set_phy_cfg(hw, pi->lport, &cfg, NULL); > > + > > +out: > > + ice_free(hw, pcaps); > > + return status; > > +} > > + > > +static int > > +ice_dev_set_link_up(struct rte_eth_dev *dev) { > > + struct ice_hw *hw =3D ICE_DEV_PRIVATE_TO_HW(dev->data- > >dev_private); > > + > > + return ice_force_phys_link_state(hw, true); } > > + > > +static int > > +ice_dev_set_link_down(struct rte_eth_dev *dev) { > > + struct ice_hw *hw =3D ICE_DEV_PRIVATE_TO_HW(dev->data- > >dev_private); > > + > > + return ice_force_phys_link_state(hw, false); } > > + > > static int > > ice_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) { > > -- > > 2.7.4