From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id DDB7CA0471 for ; Fri, 21 Jun 2019 02:55:20 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 2D67F1D4C9; Fri, 21 Jun 2019 02:55:20 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 41B6D1D4C5 for ; Fri, 21 Jun 2019 02:55:18 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Jun 2019 17:55:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,398,1557212400"; d="scan'208";a="165507721" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by orsmga006.jf.intel.com with ESMTP; 20 Jun 2019 17:55:17 -0700 Received: from fmsmsx111.amr.corp.intel.com (10.18.116.5) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 20 Jun 2019 17:55:16 -0700 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by fmsmsx111.amr.corp.intel.com (10.18.116.5) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 20 Jun 2019 17:55:16 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.87]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.185]) with mapi id 14.03.0439.000; Fri, 21 Jun 2019 08:55:14 +0800 From: "Wang, Haiyue" To: Stephen Hemminger CC: "dev@dpdk.org" Thread-Topic: [dpdk-dev] [RFC] ethdev: reserve the RX offload most-significant bits for PMD scartch Thread-Index: AQHVJzn/6O52XV/ZVE6lR0PdsKGer6akWVeAgADsT4A= Date: Fri, 21 Jun 2019 00:55:13 +0000 Message-ID: References: <1561015552-37671-1-git-send-email-haiyue.wang@intel.com> <20190620113537.60f091fd@hermes.lan> In-Reply-To: <20190620113537.60f091fd@hermes.lan> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZjI1MjQxNjUtYTQwNi00M2U3LTk5ZTgtNzExNjFmOTRmMWY1IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiWFF6NjRmbm8xdnVLc2x6K3NnOUs4U1JIZnd1K2xxWEJLd0ZOVm4ySExRR1U0YkxKTmg1WCtEdUtSeGFhWmFGUiJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [RFC] ethdev: reserve the RX offload most-significant bits for PMD scartch X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi > -----Original Message----- > From: Stephen Hemminger [mailto:stephen@networkplumber.org] > Sent: Friday, June 21, 2019 02:36 > To: Wang, Haiyue > Cc: dev@dpdk.org > Subject: Re: [dpdk-dev] [RFC] ethdev: reserve the RX offload most-signifi= cant bits for PMD scartch >=20 > On Thu, 20 Jun 2019 15:25:52 +0800 > Haiyue Wang wrote: >=20 > > Generally speaking, the DEV_RX_OFFLOAD_xxx for RX offload capabilities > > of a device is one-bit field definition, it has 64 different values at > > most. > > > > Nowdays the receiving queue of NIC has rich features not just checksum > > offload, like it can extract the network protocol header fields to its > > RX descriptors for quickly handling. But this kind of feature is not so > > common, and it is hardware related. Normally, this can be done through > > rte_devargs driver parameters, but the scope is per device. This is not > > so nice for per queue design. > > > > The per queue API 'rte_eth_rx_queue_setup' and data structure 'struct > > rte_eth_rxconf' are stable now, and be common for all PMDs. For keeping > > the ethdev API & ABI compatibility, and the application can make good > > use of the NIC's specific features, reserving the most-significant bits > > of RX offload seems an compromise method. > > > > Then the PMDs redefine these bits as they want, all PMDs share the same > > bit positions and expose their new definitions with the header file. > > > > The experimental reserved bits number is 6 currently. Tt can be one-bit > > for each features up to the the maximum number 6. It can also be some > > bits encoding: e.g, 6 bits can stand for 63 maximum number of features. > > > > We call these reserved bits as DEV_RX_OFFLOAD_PMD_SCRATCH. And the left > > unused bits number is : 64 - 19 (currently defined) - 6 (PMD scartch) = =3D > > 39. > > > > This is not so nice for applications, they need to check PMD's driver > > name for lookuping their DEV_RX_OFFLOAD_PMD_SCRATCH definitions. But it > > is good for the applications to make use of the hardware compatibility. > > > > Signed-off-by: Haiyue Wang > > --- >=20 > Anything that is per device type is useless for a generic application. > The goal of the DPDK should be to provide a high performance platform > that works for many device types. Too often, I see patches from hardware > vendors that are just "we can enable are cool proprietary hardware > feature in DPDK". This would just encourage that bad practice. Understand the DPDK's dream. :) This patch wants to make the bad applicatio= n and bad vender to use the DPDK's generic high performance platform features= , plus some bad practice like doing special hardware optimization. Very appreciate your feedback. The PMDs should limit their desires. ;-)