From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 42EB1A84F for ; Tue, 16 Jan 2018 13:06:54 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Jan 2018 04:06:53 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,368,1511856000"; d="scan'208";a="10937487" Received: from irsmsx101.ger.corp.intel.com ([163.33.3.153]) by orsmga006.jf.intel.com with ESMTP; 16 Jan 2018 04:06:51 -0800 Received: from irsmsx102.ger.corp.intel.com ([169.254.2.180]) by IRSMSX101.ger.corp.intel.com ([169.254.1.46]) with mapi id 14.03.0319.002; Tue, 16 Jan 2018 12:06:50 +0000 From: "Van Haaren, Harry" To: Pavan Nikhilesh , "jerin.jacob@caviumnetworks.com" , "santosh.shukla@caviumnetworks.com" , "Eads, Gage" , "hemant.agrawal@nxp.com" , "nipun.gupta@nxp.com" , "Ma, Liang J" CC: "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH v4 12/13] app/eventdev: add pipeline atq worker functions Thread-Index: AQHTi8TNotGRS/dr3kKNrDqupvfrB6N2bUJg Date: Tue, 16 Jan 2018 12:06:50 +0000 Message-ID: References: <20171130072406.15605-1-pbhagavatula@caviumnetworks.com> <20180112164416.21374-1-pbhagavatula@caviumnetworks.com> <20180112164416.21374-12-pbhagavatula@caviumnetworks.com> In-Reply-To: <20180112164416.21374-12-pbhagavatula@caviumnetworks.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiM2IxZmY5NGUtMmJlYS00YTljLWE1NTgtMjk0Y2Q0NTMzY2UwIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6Im1sakFkbzZyZGJmTVwvc3dUYnN2cmI2SDlNSEhrUDZnVU9PcXI0NW9jVG1FPSJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.0.116 dlp-reaction: no-action x-originating-ip: [163.33.239.181] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v4 12/13] app/eventdev: add pipeline atq worker functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 16 Jan 2018 12:06:55 -0000 > From: Pavan Nikhilesh [mailto:pbhagavatula@caviumnetworks.com] > Sent: Friday, January 12, 2018 4:44 PM > To: jerin.jacob@caviumnetworks.com; santosh.shukla@caviumnetworks.com; Va= n > Haaren, Harry ; Eads, Gage > ; hemant.agrawal@nxp.com; nipun.gupta@nxp.com; Ma, > Liang J > Cc: dev@dpdk.org; Pavan Nikhilesh > Subject: [dpdk-dev] [PATCH v4 12/13] app/eventdev: add pipeline atq worke= r > functions >=20 > Signed-off-by: Pavan Nikhilesh Same comments about duplication as 2 patches previous, and this re-uses the= previous defines. Acked-by: Harry van Haaren > --- > app/test-eventdev/test_pipeline_atq.c | 281 > +++++++++++++++++++++++++++++++++- > 1 file changed, 280 insertions(+), 1 deletion(-) >=20 > diff --git a/app/test-eventdev/test_pipeline_atq.c b/app/test- > eventdev/test_pipeline_atq.c > index 6c9ac6119..f4cfd3cc7 100644 > --- a/app/test-eventdev/test_pipeline_atq.c > +++ b/app/test-eventdev/test_pipeline_atq.c > @@ -15,10 +15,289 @@ pipeline_atq_nb_event_queues(struct evt_options *opt= ) > return rte_eth_dev_count(); > } >=20 > +static int > +pipeline_atq_worker_single_stage_tx(void *arg) > +{ > + PIPELINE_WROKER_SINGLE_STAGE_INIT; > + > + while (t->done =3D=3D false) { > + uint16_t event =3D rte_event_dequeue_burst(dev, port, &ev, 1, 0); > + > + if (!event) { > + rte_pause(); > + continue; > + } > + > + if (ev.sched_type =3D=3D RTE_SCHED_TYPE_ATOMIC) { > + pipeline_tx_pkt(ev.mbuf); > + w->processed_pkts++; > + continue; > + } > + pipeline_fwd_event(&ev, RTE_SCHED_TYPE_ATOMIC); > + pipeline_event_enqueue(dev, port, &ev); > + } > + > + return 0; > +} > + > +static int > +pipeline_atq_worker_single_stage_fwd(void *arg) > +{ > + PIPELINE_WROKER_SINGLE_STAGE_INIT; > + const uint8_t tx_queue =3D t->tx_service.queue_id; > + > + while (t->done =3D=3D false) { > + uint16_t event =3D rte_event_dequeue_burst(dev, port, &ev, 1, 0); > + > + if (!event) { > + rte_pause(); > + continue; > + } > + > + w->processed_pkts++; > + ev.queue_id =3D tx_queue; > + pipeline_fwd_event(&ev, RTE_SCHED_TYPE_ATOMIC); > + pipeline_event_enqueue(dev, port, &ev); > + } > + > + return 0; > +} > + > +static int > +pipeline_atq_worker_single_stage_burst_tx(void *arg) > +{ > + PIPELINE_WROKER_SINGLE_STAGE_BURST_INIT; > + > + while (t->done =3D=3D false) { > + uint16_t nb_rx =3D rte_event_dequeue_burst(dev, port, ev, > + BURST_SIZE, 0); > + > + if (!nb_rx) { > + rte_pause(); > + continue; > + } > + > + for (i =3D 0; i < nb_rx; i++) { > + rte_prefetch0(ev[i + 1].mbuf); > + if (ev[i].sched_type =3D=3D RTE_SCHED_TYPE_ATOMIC) { > + > + pipeline_tx_pkt(ev[i].mbuf); > + ev[i].op =3D RTE_EVENT_OP_RELEASE; > + w->processed_pkts++; > + } else > + pipeline_fwd_event(&ev[i], > + RTE_SCHED_TYPE_ATOMIC); > + } > + > + pipeline_event_enqueue_burst(dev, port, ev, nb_rx); > + } > + > + return 0; > +} > + > +static int > +pipeline_atq_worker_single_stage_burst_fwd(void *arg) > +{ > + PIPELINE_WROKER_SINGLE_STAGE_BURST_INIT; > + const uint8_t tx_queue =3D t->tx_service.queue_id; > + > + while (t->done =3D=3D false) { > + uint16_t nb_rx =3D rte_event_dequeue_burst(dev, port, ev, > + BURST_SIZE, 0); > + > + if (!nb_rx) { > + rte_pause(); > + continue; > + } > + > + for (i =3D 0; i < nb_rx; i++) { > + rte_prefetch0(ev[i + 1].mbuf); > + ev[i].queue_id =3D tx_queue; > + pipeline_fwd_event(&ev[i], RTE_SCHED_TYPE_ATOMIC); > + w->processed_pkts++; > + } > + > + pipeline_event_enqueue_burst(dev, port, ev, nb_rx); > + } > + > + return 0; > +} > + > +static int > +pipeline_atq_worker_multi_stage_tx(void *arg) > +{ > + PIPELINE_WROKER_MULTI_STAGE_INIT; > + const uint8_t nb_stages =3D t->opt->nb_stages; > + > + > + while (t->done =3D=3D false) { > + uint16_t event =3D rte_event_dequeue_burst(dev, port, &ev, 1, 0); > + > + if (!event) { > + rte_pause(); > + continue; > + } > + > + cq_id =3D ev.sub_event_type % nb_stages; > + > + if (cq_id =3D=3D last_queue) { > + if (ev.sched_type =3D=3D RTE_SCHED_TYPE_ATOMIC) { > + > + pipeline_tx_pkt(ev.mbuf); > + w->processed_pkts++; > + continue; > + } > + pipeline_fwd_event(&ev, RTE_SCHED_TYPE_ATOMIC); > + } else { > + ev.sub_event_type++; > + pipeline_fwd_event(&ev, sched_type_list[cq_id]); > + } > + > + pipeline_event_enqueue(dev, port, &ev); > + } > + return 0; > +} > + > +static int > +pipeline_atq_worker_multi_stage_fwd(void *arg) > +{ > + PIPELINE_WROKER_MULTI_STAGE_INIT; > + const uint8_t nb_stages =3D t->opt->nb_stages; > + const uint8_t tx_queue =3D t->tx_service.queue_id; > + > + while (t->done =3D=3D false) { > + uint16_t event =3D rte_event_dequeue_burst(dev, port, &ev, 1, 0); > + > + if (!event) { > + rte_pause(); > + continue; > + } > + > + cq_id =3D ev.sub_event_type % nb_stages; > + > + if (cq_id =3D=3D last_queue) { > + w->processed_pkts++; > + ev.queue_id =3D tx_queue; > + pipeline_fwd_event(&ev, RTE_SCHED_TYPE_ATOMIC); > + } else { > + ev.sub_event_type++; > + pipeline_fwd_event(&ev, sched_type_list[cq_id]); > + } > + > + pipeline_event_enqueue(dev, port, &ev); > + } > + return 0; > +} > + > +static int > +pipeline_atq_worker_multi_stage_burst_tx(void *arg) > +{ > + PIPELINE_WROKER_MULTI_STAGE_BURST_INIT; > + const uint8_t nb_stages =3D t->opt->nb_stages; > + > + while (t->done =3D=3D false) { > + uint16_t nb_rx =3D rte_event_dequeue_burst(dev, port, ev, > + BURST_SIZE, 0); > + > + if (!nb_rx) { > + rte_pause(); > + continue; > + } > + > + for (i =3D 0; i < nb_rx; i++) { > + rte_prefetch0(ev[i + 1].mbuf); > + cq_id =3D ev[i].sub_event_type % nb_stages; > + > + if (cq_id =3D=3D last_queue) { > + if (ev[i].sched_type =3D=3D RTE_SCHED_TYPE_ATOMIC) { > + > + pipeline_tx_pkt(ev[i].mbuf); > + ev[i].op =3D RTE_EVENT_OP_RELEASE; > + w->processed_pkts++; > + continue; > + } > + > + pipeline_fwd_event(&ev[i], > + RTE_SCHED_TYPE_ATOMIC); > + } else { > + ev[i].sub_event_type++; > + pipeline_fwd_event(&ev[i], > + sched_type_list[cq_id]); > + } > + } > + > + pipeline_event_enqueue_burst(dev, port, ev, nb_rx); > + } > + return 0; > +} > + > +static int > +pipeline_atq_worker_multi_stage_burst_fwd(void *arg) > +{ > + PIPELINE_WROKER_MULTI_STAGE_BURST_INIT; > + const uint8_t nb_stages =3D t->opt->nb_stages; > + const uint8_t tx_queue =3D t->tx_service.queue_id; > + > + while (t->done =3D=3D false) { > + uint16_t nb_rx =3D rte_event_dequeue_burst(dev, port, ev, > + BURST_SIZE, 0); > + > + if (!nb_rx) { > + rte_pause(); > + continue; > + } > + > + for (i =3D 0; i < nb_rx; i++) { > + rte_prefetch0(ev[i + 1].mbuf); > + cq_id =3D ev[i].sub_event_type % nb_stages; > + > + if (cq_id =3D=3D last_queue) { > + w->processed_pkts++; > + ev[i].queue_id =3D tx_queue; > + pipeline_fwd_event(&ev[i], > + RTE_SCHED_TYPE_ATOMIC); > + } else { > + ev[i].sub_event_type++; > + pipeline_fwd_event(&ev[i], > + sched_type_list[cq_id]); > + } > + } > + > + pipeline_event_enqueue_burst(dev, port, ev, nb_rx); > + } > + return 0; > +} > + > static int > worker_wrapper(void *arg) > { > - RTE_SET_USED(arg); > + struct worker_data *w =3D arg; > + struct evt_options *opt =3D w->t->opt; > + const bool burst =3D evt_has_burst_mode(w->dev_id); > + const bool mt_safe =3D !w->t->mt_unsafe; > + const uint8_t nb_stages =3D opt->nb_stages; > + RTE_SET_USED(opt); > + > + /* allow compiler to optimize */ > + if (nb_stages =3D=3D 1) { > + if (!burst && mt_safe) > + return pipeline_atq_worker_single_stage_tx(arg); > + else if (!burst && !mt_safe) > + return pipeline_atq_worker_single_stage_fwd(arg); > + else if (burst && mt_safe) > + return pipeline_atq_worker_single_stage_burst_tx(arg); > + else if (burst && !mt_safe) > + return pipeline_atq_worker_single_stage_burst_fwd(arg); > + } else { > + if (!burst && mt_safe) > + return pipeline_atq_worker_multi_stage_tx(arg); > + else if (!burst && !mt_safe) > + return pipeline_atq_worker_multi_stage_fwd(arg); > + if (burst && mt_safe) > + return pipeline_atq_worker_multi_stage_burst_tx(arg); > + else if (burst && !mt_safe) > + return pipeline_atq_worker_multi_stage_burst_fwd(arg); > + } > rte_panic("invalid worker\n"); > } >=20 > -- > 2.14.1