From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 5B9C87CAA for ; Mon, 10 Jul 2017 05:38:43 +0200 (CEST) Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Jul 2017 20:38:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.40,337,1496127600"; d="scan'208";a="125163524" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by fmsmga006.fm.intel.com with ESMTP; 09 Jul 2017 20:38:39 -0700 Received: from fmsmsx118.amr.corp.intel.com (10.18.116.18) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.319.2; Sun, 9 Jul 2017 20:38:39 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by fmsmsx118.amr.corp.intel.com (10.18.116.18) with Microsoft SMTP Server (TLS) id 14.3.319.2; Sun, 9 Jul 2017 20:38:38 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.116]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.56]) with mapi id 14.03.0319.002; Mon, 10 Jul 2017 11:38:35 +0800 From: "Tan, Jianfeng" To: Shijith Thotton , "dev@dpdk.org" CC: "Yigit, Ferruh" , Gregory Etelson , Thomas Monjalon , Stephen Hemminger , "Lu, Wenzhuo" Thread-Topic: [PATCH v2] igb_uio: issue FLR during open and release of device file Thread-Index: AQHS9xJeDWJhiKEKukmBDD930EmyaaJMbNRQ Date: Mon, 10 Jul 2017 03:38:34 +0000 Message-ID: References: <1497260285-27536-1-git-send-email-shijith.thotton@caviumnetworks.com> <1499426031-2664-1-git-send-email-shijith.thotton@caviumnetworks.com> In-Reply-To: <1499426031-2664-1-git-send-email-shijith.thotton@caviumnetworks.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2] igb_uio: issue FLR during open and release of device file X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 10 Jul 2017 03:38:44 -0000 Hi Thotton, > -----Original Message----- > From: Shijith Thotton [mailto:shijith.thotton@caviumnetworks.com] > Sent: Friday, July 7, 2017 7:14 PM > To: dev@dpdk.org > Cc: Yigit, Ferruh; Gregory Etelson; Thomas Monjalon; Stephen Hemminger; > Tan, Jianfeng; Lu, Wenzhuo > Subject: [PATCH v2] igb_uio: issue FLR during open and release of device = file >=20 > Set UIO info device file operations open and release. Call pci reset > function inside open and release to clear device state at start and end. > Copied this behaviour from vfio_pci kernel module code. With this patch, > it is not mandatory to issue FLR by PMD's during init and close. I'm afraid this will not work for restarted DPDK process. In current probe(= ), we set up the I/O mem and I/O port; and those sys files are used by EAL = IGB_UIO initialization code to map I/O mem and port. After reset in release= (), we will lose those sys files in next open(). Thanks, Jianfeng >=20 > Bus master enable and disable are added in open and release respectively > to take care of device DMA. >=20 > Signed-off-by: Shijith Thotton > --- > v2 changes: > - Replaced pci_try_reset_function with pci_reset_function as it is not > available in older kernel versions. >=20 > v1 changes: > - Added pci set master inside open and clear master inside release. > - Remove obvious comments. >=20 > RFC: http://dpdk.org/ml/archives/dev/2017-May/066917.html >=20 > lib/librte_eal/linuxapp/igb_uio/igb_uio.c | 33 > +++++++++++++++++++++++++++++++ > 1 file changed, 33 insertions(+) >=20 > diff --git a/lib/librte_eal/linuxapp/igb_uio/igb_uio.c > b/lib/librte_eal/linuxapp/igb_uio/igb_uio.c > index b9d427c..07a19a3 100644 > --- a/lib/librte_eal/linuxapp/igb_uio/igb_uio.c > +++ b/lib/librte_eal/linuxapp/igb_uio/igb_uio.c > @@ -170,6 +170,37 @@ struct rte_uio_pci_dev { > return IRQ_HANDLED; > } >=20 > +/** > + * This gets called while opening uio device file. > + */ > +static int > +igbuio_pci_open(struct uio_info *info, struct inode *inode) > +{ > + struct rte_uio_pci_dev *udev =3D info->priv; > + struct pci_dev *dev =3D udev->pdev; > + > + pci_reset_function(dev); > + > + /* set bus master, which was cleared by the reset function */ > + pci_set_master(dev); > + > + return 0; > +} > + > +static int > +igbuio_pci_release(struct uio_info *info, struct inode *inode) > +{ > + struct rte_uio_pci_dev *udev =3D info->priv; > + struct pci_dev *dev =3D udev->pdev; > + > + /* stop the device from further DMA */ > + pci_clear_master(dev); > + > + pci_reset_function(dev); > + > + return 0; > +} > + > #ifdef CONFIG_XEN_DOM0 > static int > igbuio_dom0_mmap_phys(struct uio_info *info, struct vm_area_struct > *vma) > @@ -372,6 +403,8 @@ struct rte_uio_pci_dev { > udev->info.version =3D "0.1"; > udev->info.handler =3D igbuio_pci_irqhandler; > udev->info.irqcontrol =3D igbuio_pci_irqcontrol; > + udev->info.open =3D igbuio_pci_open; > + udev->info.release =3D igbuio_pci_release; > #ifdef CONFIG_XEN_DOM0 > /* check if the driver run on Xen Dom0 */ > if (xen_initial_domain()) > -- > 1.8.3.1