From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 0A6538E5E for ; Thu, 14 Jan 2016 08:16:00 +0100 (CET) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 13 Jan 2016 23:16:00 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,293,1449561600"; d="scan'208";a="890220684" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by orsmga002.jf.intel.com with ESMTP; 13 Jan 2016 23:15:59 -0800 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.248.2; Wed, 13 Jan 2016 23:15:53 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.117]) by shsmsx102.ccr.corp.intel.com ([169.254.2.172]) with mapi id 14.03.0248.002; Thu, 14 Jan 2016 15:15:51 +0800 From: "Zhang, Helin" To: Matthew Hall Thread-Topic: [dpdk-dev] librte_power w/ intel_pstate cpufreq governor Thread-Index: AQHRRfurFgXgnEmlnEeFzSCFs4FFBJ74CvTggAIWb4CAAIebIA== Date: Thu, 14 Jan 2016 07:15:51 +0000 Message-ID: References: <20151206000839.GA23450@mhcomputing.net> <5688D2EE.5010700@mhcomputing.net> <20160114070355.GA14958@mhcomputing.net> In-Reply-To: <20160114070355.GA14958@mhcomputing.net> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Cc: "dev@dpdk.org" Subject: Re: [dpdk-dev] librte_power w/ intel_pstate cpufreq governor X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 14 Jan 2016 07:16:01 -0000 > -----Original Message----- > From: Matthew Hall [mailto:mhall@mhcomputing.net] > Sent: Thursday, January 14, 2016 3:04 PM > To: Zhang, Helin > Cc: dev@dpdk.org; Liang, Cunming; Zhou, Danny > Subject: Re: [dpdk-dev] librte_power w/ intel_pstate cpufreq governor >=20 > On Tue, Jan 12, 2016 at 03:17:21PM +0000, Zhang, Helin wrote: > > Hi Matthew > > > > Yes, you have indicated out the key, the power management module has > changed or upgraded. > > Could you help to try the legacy one to see if it still works, as indic= ated in > your link? >=20 > I can do this, but according to the documents I am reading, the old Power > Management module is secretly stubbed out / no-opped inside of the > Skylake CPU core, and the core manages its own clockrate internally every= 1 > msec instead of every 30 msec with input from the OS (Intel Speed Shift > technology). >=20 > If this is true, then I suspect there is no point to getting it to work a= gain with > either the old frequency driver or the new driver, because the chip would > not listen to it. So then it seems like it makes sense to skip the clock > adjustment callbacks on Skylake and take extra stuff out of the fastpath = code. That's disappointing if Skylake is like that. Let's have a learning first, = and then check if we can fix that. But in addition, DPDK provide interrupt based packet receiving mechanism, c= an it be one of your choice? For now, I am afraid that I don't have time on it, as we are all focusing o= n the next release development. If no objection, I will find time later (may be in a month) to investigate = that. Of cause, please try to investigate that from your side. >=20 > > Taking control of the governor from kernel to user space, might need > > one more checks before that. But it is actually not a big issue, as > > user can switch it back to anything via 'echo'. >=20 > I think it's a bit bigger issue, as it leaves the chip in full-power mode= without > really warning anybody, instead of the standard default adaptive mode. That's always there, for example, DPDK can exit accidently, without caring = anything. Then you can have the similar issue again. >=20 > > Yes, it seems that librte_power is out of date for a while. It is not > > easy to track all the kernel versions. Now we have good chance to do > > that, as you have reported issues. Let's have a look on the new power > > management mechanism and then see if we can do something. >=20 > Yes, let me know how I could help. I don't know very much yet. My machine > is Skylake Core i7-6700k. Unfortunately I think I am in trouble here, bec= ause > there is no whitepaper on the Intel website for Intel Speed Shift technol= ogy > at all. It seems that you are so important for Intel. :) I don't have Skylake in ha= nd. :( Anyway, I will try to find time on that, and hopefully will find something = or solution. Thank you very much for the great jobs! Regards, Helin >=20 > > Really thanks to your questions! >=20 > I am looking forward to getting some answers figured out together. >=20 > > Regards, > > Helin >=20 > Matthew.