From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id AE50C2A5E for ; Thu, 25 Feb 2016 09:51:57 +0100 (CET) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga101.jf.intel.com with ESMTP; 25 Feb 2016 00:51:52 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,497,1449561600"; d="scan'208";a="54460863" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by fmsmga004.fm.intel.com with ESMTP; 25 Feb 2016 00:51:52 -0800 Received: from fmsmsx120.amr.corp.intel.com (10.18.124.208) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.248.2; Thu, 25 Feb 2016 00:51:51 -0800 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by fmsmsx120.amr.corp.intel.com (10.18.124.208) with Microsoft SMTP Server (TLS) id 14.3.248.2; Thu, 25 Feb 2016 00:51:51 -0800 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.132]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.136]) with mapi id 14.03.0248.002; Thu, 25 Feb 2016 16:51:24 +0800 From: "Zhang, Helin" To: "Wu, Jingjing" , "dev@dpdk.org" Thread-Topic: [PATCH 02/12] i40e: split function for input set change of hash and fdir Thread-Index: AQHRWAKKRSGJmz+Ac0GaXcWU3+r2yp88oGtQ Date: Thu, 25 Feb 2016 08:51:24 +0000 Message-ID: References: <1451032200-24973-1-git-send-email-jingjing.wu@intel.com> <1453789575-6297-1-git-send-email-jingjing.wu@intel.com> <1453789575-6297-3-git-send-email-jingjing.wu@intel.com> In-Reply-To: <1453789575-6297-3-git-send-email-jingjing.wu@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH 02/12] i40e: split function for input set change of hash and fdir X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 25 Feb 2016 08:51:58 -0000 Jingjing Your patches have depencies on my i40e base driver udpate patch set. Some registers should be read/written by AQ commands, with using interfaces of i40e_read_rx_ctl() and i40e_write_rx_ctl(). Please check below link and see the list of those registers. http://www.dpdk.org/dev/patchwork/patch/10654/ Regards, Helin > -----Original Message----- > From: Wu, Jingjing > Sent: Tuesday, January 26, 2016 2:26 PM > To: dev@dpdk.org > Cc: Wu, Jingjing; Zhang, Helin; Chilikin, Andrey; Lu, Wenzhuo; Pei, Yulon= g > Subject: [PATCH 02/12] i40e: split function for input set change of hash = and > fdir >=20 > This patch split function for input set changing of hash and fdir to avoi= d > multiple check on different situation. >=20 > Signed-off-by: Jingjing Wu > --- > drivers/net/i40e/i40e_ethdev.c | 233 +++++++++++++++++------------------= -- > ---- > drivers/net/i40e/i40e_ethdev.h | 11 +- > drivers/net/i40e/i40e_fdir.c | 5 +- > 3 files changed, 107 insertions(+), 142 deletions(-) >=20 > diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethde= v.c > index bf6220d..004e206 100644 > --- a/drivers/net/i40e/i40e_ethdev.c > +++ b/drivers/net/i40e/i40e_ethdev.c > @@ -6845,25 +6845,6 @@ i40e_generate_inset_mask_reg(uint64_t inset, > uint32_t *mask, uint8_t nb_elem) > return idx; > } >=20 > -static uint64_t > -i40e_get_reg_inset(struct i40e_hw *hw, enum rte_filter_type filter, > - enum i40e_filter_pctype pctype) > -{ > - uint64_t reg =3D 0; > - > - if (filter =3D=3D RTE_ETH_FILTER_HASH) { > - reg =3D I40E_READ_REG(hw, I40E_GLQF_HASH_INSET(1, > pctype)); > - reg <<=3D I40E_32_BIT_WIDTH; > - reg |=3D I40E_READ_REG(hw, I40E_GLQF_HASH_INSET(0, > pctype)); > - } else if (filter =3D=3D RTE_ETH_FILTER_FDIR) { > - reg =3D I40E_READ_REG(hw, I40E_PRTQF_FD_INSET(pctype, > 1)); > - reg <<=3D I40E_32_BIT_WIDTH; > - reg |=3D I40E_READ_REG(hw, I40E_PRTQF_FD_INSET(pctype, > 0)); > - } > - > - return reg; > -} > - > static void > i40e_check_write_reg(struct i40e_hw *hw, uint32_t addr, uint32_t val) > { @@ -6876,103 +6857,96 @@ i40e_check_write_reg(struct i40e_hw *hw, > uint32_t addr, uint32_t val) > (uint32_t)I40E_READ_REG(hw, addr)); } >=20 > -static int > -i40e_set_hash_inset_mask(struct i40e_hw *hw, > - enum i40e_filter_pctype pctype, > - enum rte_filter_input_set_op op, > - uint32_t *mask_reg, > - uint8_t num) > +int > +i40e_hash_filter_inset_select(struct i40e_hw *hw, > + struct rte_eth_input_set_conf *conf) > { > - uint32_t reg; > - uint8_t i; > + struct i40e_pf *pf =3D &((struct i40e_adapter *)hw->back)->pf; If you have check of 'if (!hw || !conf)', above line is not good. > + enum i40e_filter_pctype pctype; > + uint64_t input_set, inset_reg =3D 0; > + uint32_t mask_reg[I40E_INSET_MASK_NUM_REG] =3D {0}; > + int ret, i, num; >=20 > - if (!mask_reg || num > RTE_ETH_INPUT_SET_SELECT) > + if (!hw || !conf) { Check hw might not be needed at all.