From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 5D61FD528 for ; Fri, 11 Nov 2016 14:54:22 +0100 (CET) Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga105.jf.intel.com with ESMTP; 11 Nov 2016 05:54:21 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,621,1473145200"; d="scan'208";a="30136811" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by fmsmga006.fm.intel.com with ESMTP; 11 Nov 2016 05:54:21 -0800 Received: from fmsmsx151.amr.corp.intel.com (10.18.125.4) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.248.2; Fri, 11 Nov 2016 05:54:21 -0800 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by FMSMSX151.amr.corp.intel.com (10.18.125.4) with Microsoft SMTP Server (TLS) id 14.3.248.2; Fri, 11 Nov 2016 05:54:21 -0800 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.96]) by shsmsx102.ccr.corp.intel.com ([169.254.2.239]) with mapi id 14.03.0248.002; Fri, 11 Nov 2016 21:54:17 +0800 From: "Zhang, Helin" To: Satha Rao CC: "Wu, Jingjing" , "jerin.jacob@caviumnetworks.com" , "jianbo.liu@linaro.org" , "dev@dpdk.org" Thread-Topic: [PATCH] i40e: Fix eth_i40e_dev_init sequence on ThunderX Thread-Index: AQHSO0r3nCWcNmiG8Uakfe1aNyEmJqDTzoEg Date: Fri, 11 Nov 2016 13:54:17 +0000 Message-ID: References: <1478779467-35123-1-git-send-email-skoteshwar@caviumnetworks.com> In-Reply-To: <1478779467-35123-1-git-send-email-skoteshwar@caviumnetworks.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH] i40e: Fix eth_i40e_dev_init sequence on ThunderX X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 11 Nov 2016 13:54:23 -0000 Hi Rao The existing rule is to try best not modify source files in the folder of b= ase/ for each PMD. The exceptions are *_osdep.h or *_osdep.c. So for your case, please redefine the rd32/wr32 in i40e_osdep.h. (with cond= ition compiles for ARM?, as other CPU structures may not need that.) Regards, Helin > -----Original Message----- > From: Satha Rao [mailto:skoteshwar@caviumnetworks.com] > Sent: Thursday, November 10, 2016 8:04 PM > To: Zhang, Helin > Cc: Wu, Jingjing; jerin.jacob@caviumnetworks.com; jianbo.liu@linaro.org; > dev@dpdk.org; Satha Rao > Subject: [PATCH] i40e: Fix eth_i40e_dev_init sequence on ThunderX >=20 > i40e_asq_send_command: rd32 & wr32 under ThunderX gives unpredictable > results. To solve this include rte memory barriers >=20 > Signed-off-by: Satha Rao > --- > drivers/net/i40e/base/i40e_adminq.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) >=20 > diff --git a/drivers/net/i40e/base/i40e_adminq.c > b/drivers/net/i40e/base/i40e_adminq.c > index 0d3a83f..1038a95 100644 > --- a/drivers/net/i40e/base/i40e_adminq.c > +++ b/drivers/net/i40e/base/i40e_adminq.c > @@ -832,6 +832,7 @@ enum i40e_status_code > i40e_asq_send_command(struct i40e_hw *hw, > } >=20 > val =3D rd32(hw, hw->aq.asq.head); > + rte_rmb(); > if (val >=3D hw->aq.num_asq_entries) { > i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, > "AQTX: head overrun at %d\n", val); @@ -929,8 > +930,10 @@ enum i40e_status_code i40e_asq_send_command(struct > i40e_hw *hw, > (hw->aq.asq.next_to_use)++; > if (hw->aq.asq.next_to_use =3D=3D hw->aq.asq.count) > hw->aq.asq.next_to_use =3D 0; > - if (!details->postpone) > + if (!details->postpone) { > wr32(hw, hw->aq.asq.tail, hw->aq.asq.next_to_use); > + rte_wmb(); > + } >=20 > /* if cmd_details are not defined or async flag is not set, > * we need to wait for desc write back > -- > 2.7.4