From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 40079A2EEB for ; Tue, 10 Sep 2019 09:10:29 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 00F4E1EB5D; Tue, 10 Sep 2019 09:10:28 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 1CFAE1EB48 for ; Tue, 10 Sep 2019 09:10:25 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 10 Sep 2019 00:10:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,487,1559545200"; d="scan'208";a="191731788" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by FMSMGA003.fm.intel.com with ESMTP; 10 Sep 2019 00:10:25 -0700 Received: from fmsmsx115.amr.corp.intel.com (10.18.116.19) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 10 Sep 2019 00:10:25 -0700 Received: from shsmsx108.ccr.corp.intel.com (10.239.4.97) by fmsmsx115.amr.corp.intel.com (10.18.116.19) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 10 Sep 2019 00:10:24 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.92]) by SHSMSX108.ccr.corp.intel.com ([169.254.8.146]) with mapi id 14.03.0439.000; Tue, 10 Sep 2019 15:10:22 +0800 From: "Yang, Qiming" To: "Ye, Xiaolong" CC: "Wang, Ying A" , "Zhang, Qi Z" , "dev@dpdk.org" , "Zhao1, Wei" Thread-Topic: [PATCH 1/4] net/ice: add devargs to control pipeline mode Thread-Index: AQHVYus4h4r3LH6pjkiCO2+61bOjCaca7iaAgAe/ykD//+ThgIAB9Nng Date: Tue, 10 Sep 2019 07:10:21 +0000 Message-ID: References: <20190903221522.151382-1-ying.a.wang@intel.com> <20190903221522.151382-2-ying.a.wang@intel.com> <20190904123409.GB54897@intel.com> <20190909091721.GB20737@intel.com> In-Reply-To: <20190909091721.GB20737@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH 1/4] net/ice: add devargs to control pipeline mode X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" I got you, will fix it in v2 Qiming -----Original Message----- From: Ye, Xiaolong=20 Sent: Monday, September 9, 2019 17:17 To: Yang, Qiming Cc: Wang, Ying A ; Zhang, Qi Z ; dev@dpdk.org; Zhao1, Wei Subject: Re: [PATCH 1/4] net/ice: add devargs to control pipeline mode On 09/09, Yang, Qiming wrote: >> Can we have more description of the 'permission' and 'distributor' in th= e doc? >> And we also need update in 19.11 release note, maybe in Ying's patch. >>=20 > >I think you can ignore these concepts, just our design used, user will onl= y know we have two stages. I'll delete this sentence. At least we'll still need to tell user how to use these two stages in pract= ice. > >> >+ stage, priority is ignored. Default, generic flow API is enabled=20 >> >+ in none pipeline mode, >>=20 >> s/Default/By default >>=20 > >Got > >> >+ user can choose to use pipeline mode by set ``devargs`` parameter=20 >> >+ ``pipeline-mode-support``, >>=20 >> s/set/setting >>=20 >Got > >> >+ for example:: >> >+ >> >+ -w 80:00.0, pipleline-mode-support=3D1 >> >+ >> > Driver compilation and testing >> > ------------------------------ >> > >> >diff --git a/drivers/net/ice/ice_ethdev.c=20 >> >b/drivers/net/ice/ice_ethdev.c index 9aa7506ba..4e0645db1 100644 >> >--- a/drivers/net/ice/ice_ethdev.c >> >+++ b/drivers/net/ice/ice_ethdev.c >> >@@ -19,9 +19,11 @@ >> > >> > /* devargs */ >> > #define ICE_SAFE_MODE_SUPPORT_ARG "safe-mode-support" >> >+#define ICE_PIPELINE_MODE_SUPPORT_ARG "pipeline-mode-support" >> > >> > static const char * const ice_valid_args[] =3D { >> > ICE_SAFE_MODE_SUPPORT_ARG, >> >+ ICE_PIPELINE_MODE_SUPPORT_ARG, >> > NULL >> > }; >> > >> >@@ -1510,7 +1512,18 @@ static int ice_parse_devargs(struct=20 >> >rte_eth_dev >> >*dev) >> > >> > ret =3D rte_kvargs_process(kvlist, ICE_SAFE_MODE_SUPPORT_ARG, >> > &parse_bool, &ad- >> >devargs.safe_mode_support); >> >+ if (ret) >> >+ goto err_devargs; >> >+ >> >+ ret =3D rte_kvargs_process(kvlist, ICE_PIPELINE_MODE_SUPPORT_ARG, >> >+ &parse_bool, &ad- >> >devargs.pipeline_mode_support); >> >+ if (ret) >> >+ goto err_devargs; >> >+ >> >+ rte_kvargs_free(kvlist); >> >+ return ret; >> > >>=20 >> These 2 lines are duplicated with below code. > >Not duplicated, one for normal case, one for error case. If no this two li= nes, the first argument's return value will be covered by the second one. I don't get it, they are literally the same thing, it's a normal case or a = error case depends on the ret value obtained. What do you mean by "will be= covered by the second one"? If the first argument process succeeds, the re= t is 0, it will continue to parse the second one, if ret is non-zero, it ju= st goes out by the `goto` statement. Thanks, Xiaolong > >>=20 >> >+err_devargs: >> > rte_kvargs_free(kvlist); >> > return ret; >> > } >> >@@ -3925,7 +3938,8 @@ RTE_PMD_REGISTER_PCI(net_ice, rte_ice_pmd);=20 >> >RTE_PMD_REGISTER_PCI_TABLE(net_ice, pci_id_ice_map);=20 >> >RTE_PMD_REGISTER_KMOD_DEP(net_ice, "* igb_uio | uio_pci_generic |=20 >> >vfio-pci"); RTE_PMD_REGISTER_PARAM_STRING(net_ice, >> >- ICE_SAFE_MODE_SUPPORT_ARG "=3D<0|1>"); >> >+ ICE_SAFE_MODE_SUPPORT_ARG "=3D<0|1>" >> >+ ICE_PIPELINE_MODE_SUPPORT_ARG "=3D<0|1>"); >> > >> > RTE_INIT(ice_init_log) >> > { >> >diff --git a/drivers/net/ice/ice_ethdev.h=20 >> >b/drivers/net/ice/ice_ethdev.h index 926db23d2..9bf5de08d 100644 >> >--- a/drivers/net/ice/ice_ethdev.h >> >+++ b/drivers/net/ice/ice_ethdev.h >> >@@ -285,6 +285,7 @@ struct ice_pf { >> > */ >> > struct ice_devargs { >> > int safe_mode_support; >> >+ int pipeline_mode_support; >> > }; >> > >> > /** >> >-- >> >2.15.1 >> >