From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6DF45A3160 for ; Thu, 10 Oct 2019 05:08:45 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 222B51E864; Thu, 10 Oct 2019 05:08:45 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id C40C61E537 for ; Thu, 10 Oct 2019 05:08:42 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Oct 2019 20:08:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,278,1566889200"; d="scan'208";a="218881287" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by fmsmga004.fm.intel.com with ESMTP; 09 Oct 2019 20:08:41 -0700 Received: from fmsmsx101.amr.corp.intel.com (10.18.124.199) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 9 Oct 2019 20:08:41 -0700 Received: from shsmsx105.ccr.corp.intel.com (10.239.4.158) by fmsmsx101.amr.corp.intel.com (10.18.124.199) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 9 Oct 2019 20:08:41 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.96]) by SHSMSX105.ccr.corp.intel.com ([169.254.11.96]) with mapi id 14.03.0439.000; Thu, 10 Oct 2019 11:08:38 +0800 From: "Yang, Qiming" To: "Zhang, Qi Z" , "Lu, Wenzhuo" CC: "dev@dpdk.org" , "Ye, Xiaolong" , "Nowlin, Dan" , "Stillwell Jr, Paul M" Thread-Topic: [PATCH v3 10/12] net/ice/base: fix switch rule programming for all profiles Thread-Index: AQHVfXpiQS6SKth7/0Wxklkc8RjlOqdTNQZQ Date: Thu, 10 Oct 2019 03:08:38 +0000 Message-ID: References: <20190902035551.16852-1-qi.z.zhang@intel.com> <20191008015018.17086-1-qi.z.zhang@intel.com> <20191008015018.17086-11-qi.z.zhang@intel.com> In-Reply-To: <20191008015018.17086-11-qi.z.zhang@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v3 10/12] net/ice/base: fix switch rule programming for all profiles X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" -----Original Message----- From: Zhang, Qi Z=20 Sent: Tuesday, October 8, 2019 09:50 To: Lu, Wenzhuo ; Yang, Qiming Cc: dev@dpdk.org; Ye, Xiaolong ; Zhang, Qi Z ; Nowlin, Dan ; Stillwell Jr, Paul M <= paul.m.stillwell.jr@intel.com> Subject: [PATCH v3 10/12] net/ice/base: fix switch rule programming for all= profiles In switch rule programming, if the caller requested tunnel type of ICE_SW_T= UN_AND_NON_TUN, then the code would incorrectly attempt to add a tunneled U= DP port in the training packet, this would cause the rule addition to fail.= This patch does not attempt to add the UDP port so that the rule programmi= ng will succeed. Fixes: 75c06a770e25 ("net/ice/base: update switch training packets with ope= n ports") Signed-off-by: Dan Nowlin Signed-off-by: Paul M Stillwell Jr Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_switch.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_s= witch.c index 2c02021b1..36da27f78 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -6214,7 +6214,8 @@ ice_add_adv_rule(struct ice_hw *hw, struct ice_adv_lk= up_elem *lkups, if (status) goto err_ice_add_adv_rule; =20 - if (rinfo->tun_type !=3D ICE_NON_TUN) { + if (rinfo->tun_type !=3D ICE_NON_TUN && + rinfo->tun_type !=3D ICE_SW_TUN_AND_NON_TUN) { status =3D ice_fill_adv_packet_tun(hw, rinfo->tun_type, s_rule->pdata.lkup_tx_rx.hdr, pkt_offsets); -- 2.13.6 Acked-by: Qiming Yang