From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id AE73EA00E6 for ; Tue, 11 Jun 2019 18:30:06 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 583451C580; Tue, 11 Jun 2019 18:30:06 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id DC1611C494 for ; Tue, 11 Jun 2019 18:30:04 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Jun 2019 09:30:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,362,1557212400"; d="scan'208";a="183854339" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by fmsmga002.fm.intel.com with ESMTP; 11 Jun 2019 09:30:03 -0700 Received: from fmsmsx126.amr.corp.intel.com (10.18.125.43) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.408.0; Tue, 11 Jun 2019 09:30:02 -0700 Received: from fmsmsx120.amr.corp.intel.com ([169.254.15.191]) by FMSMSX126.amr.corp.intel.com ([169.254.1.74]) with mapi id 14.03.0415.000; Tue, 11 Jun 2019 09:30:02 -0700 From: "Stillwell Jr, Paul M" To: "Rong, Leyi" , "Zhang, Qi Z" CC: "dev@dpdk.org" Thread-Topic: [PATCH v2 27/66] net/ice/base: add some minor features Thread-Index: AQHVIG3rsX/Np6Swe0ODkLfgbmMRtqaWpJOw Date: Tue, 11 Jun 2019 16:30:02 +0000 Message-ID: References: <20190604054248.68510-1-leyi.rong@intel.com> <20190611155221.2703-1-leyi.rong@intel.com> <20190611155221.2703-28-leyi.rong@intel.com> In-Reply-To: <20190611155221.2703-28-leyi.rong@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ctpclassification: CTP_NT x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNDJmMjcyMWYtZjc4NC00ZGYyLWI5OTctODQ3N2VjMDM2NzliIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoibjN0Q05SenNcLzh3RUZ4ZjJ4dmt0SHdnejFLb05VMGNNaUUxUkgzNlwvZEYxRU54b2tpTWtyRlFpM2VnWWg0ZjVTIn0= x-originating-ip: [10.1.200.108] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2 27/66] net/ice/base: add some minor features X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Rong, Leyi > Sent: Tuesday, June 11, 2019 8:52 AM > To: Zhang, Qi Z > Cc: dev@dpdk.org; Rong, Leyi ; Stillwell Jr, Paul M > > Subject: [PATCH v2 27/66] net/ice/base: add some minor features >=20 > 1. Add loopback reporting to get link response. > 2. Add infrastructure for NVM Write/Write Activate calls. > 3. Add opcode for NVM save factory settings/NVM Update EMPR command. > 4. Add lan overflow event to ice_aq_desc. >=20 This seems like it should be split into separate patches. You also have 2 p= atches with the same commit title (27/66 & 30/66) which seems like a bad id= ea. > Signed-off-by: Paul M Stillwell Jr > Signed-off-by: Leyi Rong > --- > drivers/net/ice/base/ice_adminq_cmd.h | 47 ++++++++++++++++++-------- > - > 1 file changed, 32 insertions(+), 15 deletions(-) >=20 > diff --git a/drivers/net/ice/base/ice_adminq_cmd.h > b/drivers/net/ice/base/ice_adminq_cmd.h > index 77f93b950..4e6bce18c 100644 > --- a/drivers/net/ice/base/ice_adminq_cmd.h > +++ b/drivers/net/ice/base/ice_adminq_cmd.h > @@ -110,6 +110,7 @@ struct ice_aqc_list_caps { struct > ice_aqc_list_caps_elem { > __le16 cap; > #define ICE_AQC_CAPS_VALID_FUNCTIONS 0x0005 > +#define ICE_AQC_MAX_VALID_FUNCTIONS 0x8 > #define ICE_AQC_CAPS_VSI 0x0017 > #define ICE_AQC_CAPS_DCB 0x0018 > #define ICE_AQC_CAPS_RSS 0x0040 > @@ -143,11 +144,9 @@ struct ice_aqc_manage_mac_read { > #define ICE_AQC_MAN_MAC_WOL_ADDR_VALID BIT(7) > #define ICE_AQC_MAN_MAC_READ_S 4 > #define ICE_AQC_MAN_MAC_READ_M (0xF << > ICE_AQC_MAN_MAC_READ_S) > - u8 lport_num; > - u8 lport_num_valid; > -#define ICE_AQC_MAN_MAC_PORT_NUM_IS_VALID BIT(0) > + u8 rsvd[2]; > u8 num_addr; /* Used in response */ > - u8 reserved[3]; > + u8 rsvd1[3]; > __le32 addr_high; > __le32 addr_low; > }; > @@ -165,7 +164,7 @@ struct ice_aqc_manage_mac_read_resp { >=20 > /* Manage MAC address, write command - direct (0x0108) */ struct > ice_aqc_manage_mac_write { > - u8 port_num; > + u8 rsvd; > u8 flags; > #define ICE_AQC_MAN_MAC_WR_MC_MAG_EN BIT(0) > #define ICE_AQC_MAN_MAC_WR_WOL_LAA_PFR_KEEP BIT(1) > @@ -481,8 +480,8 @@ struct ice_aqc_vsi_props { > #define ICE_AQ_VSI_VLAN_MODE_TAGGED 0x2 > #define ICE_AQ_VSI_VLAN_MODE_ALL 0x3 > #define ICE_AQ_VSI_PVLAN_INSERT_PVID BIT(2) > -#define ICE_AQ_VSI_VLAN_EMOD_S 3 > -#define ICE_AQ_VSI_VLAN_EMOD_M (0x3 << > ICE_AQ_VSI_VLAN_EMOD_S) > +#define ICE_AQ_VSI_VLAN_EMOD_S 3 > +#define ICE_AQ_VSI_VLAN_EMOD_M (0x3 << > ICE_AQ_VSI_VLAN_EMOD_S) > #define ICE_AQ_VSI_VLAN_EMOD_STR_BOTH (0x0 << > ICE_AQ_VSI_VLAN_EMOD_S) > #define ICE_AQ_VSI_VLAN_EMOD_STR_UP (0x1 << > ICE_AQ_VSI_VLAN_EMOD_S) > #define ICE_AQ_VSI_VLAN_EMOD_STR (0x2 << > ICE_AQ_VSI_VLAN_EMOD_S) > @@ -1425,6 +1424,7 @@ struct ice_aqc_get_phy_caps_data { > #define ICE_AQC_PHY_FEC_25G_RS_CLAUSE91_EN BIT(6) > #define ICE_AQC_PHY_FEC_25G_KR_CLAUSE74_EN BIT(7) > #define ICE_AQC_PHY_FEC_MASK > MAKEMASK(0xdf, 0) > + u8 rsvd1; /* Byte 35 reserved */ > u8 extended_compliance_code; > #define ICE_MODULE_TYPE_TOTAL_BYTE 3 > u8 module_type[ICE_MODULE_TYPE_TOTAL_BYTE]; > @@ -1439,13 +1439,14 @@ struct ice_aqc_get_phy_caps_data { > #define ICE_AQC_MOD_TYPE_BYTE2_SFP_PLUS 0xA0 > #define ICE_AQC_MOD_TYPE_BYTE2_QSFP_PLUS 0x86 > u8 qualified_module_count; > + u8 rsvd2[7]; /* Bytes 47:41 reserved */ > #define ICE_AQC_QUAL_MOD_COUNT_MAX 16 > struct { > u8 v_oui[3]; > u8 rsvd3; > u8 v_part[16]; > __le32 v_rev; > - __le64 rsvd8; > + __le64 rsvd4; > } qual_modules[ICE_AQC_QUAL_MOD_COUNT_MAX]; > }; >=20 > @@ -1571,7 +1572,12 @@ struct ice_aqc_get_link_status_data { > #define ICE_AQ_LINK_TX_ACTIVE 0 > #define ICE_AQ_LINK_TX_DRAINED 1 > #define ICE_AQ_LINK_TX_FLUSHED 3 > - u8 reserved2; > + u8 lb_status; > +#define ICE_AQ_LINK_LB_PHY_LCL BIT(0) > +#define ICE_AQ_LINK_LB_PHY_RMT BIT(1) > +#define ICE_AQ_LINK_LB_MAC_LCL BIT(2) > +#define ICE_AQ_LINK_LB_PHY_IDX_S 3 > +#define ICE_AQ_LINK_LB_PHY_IDX_M (0x7 << > ICE_AQ_LB_PHY_IDX_S) > __le16 max_frame_size; > u8 cfg; > #define ICE_AQ_LINK_25G_KR_FEC_EN BIT(0) > @@ -1659,20 +1665,26 @@ struct ice_aqc_set_port_id_led { >=20 > /* NVM Read command (indirect 0x0701) > * NVM Erase commands (direct 0x0702) > - * NVM Update commands (indirect 0x0703) > + * NVM Write commands (indirect 0x0703) > + * NVM Write Activate commands (direct 0x0707) > + * NVM Shadow RAM Dump commands (direct 0x0707) > */ > struct ice_aqc_nvm { > __le16 offset_low; > u8 offset_high; > u8 cmd_flags; > #define ICE_AQC_NVM_LAST_CMD BIT(0) > -#define ICE_AQC_NVM_PCIR_REQ BIT(0) /* Used by NVM > Update reply */ > -#define ICE_AQC_NVM_PRESERVATION_S 1 > +#define ICE_AQC_NVM_PCIR_REQ BIT(0) /* Used by NVM > Write reply */ > +#define ICE_AQC_NVM_PRESERVATION_S 1 /* Used by NVM Write > Activate only */ > #define ICE_AQC_NVM_PRESERVATION_M (3 << > ICE_AQC_NVM_PRESERVATION_S) > #define ICE_AQC_NVM_NO_PRESERVATION (0 << > ICE_AQC_NVM_PRESERVATION_S) > #define ICE_AQC_NVM_PRESERVE_ALL BIT(1) > #define ICE_AQC_NVM_FACTORY_DEFAULT (2 << > ICE_AQC_NVM_PRESERVATION_S) > #define ICE_AQC_NVM_PRESERVE_SELECTED (3 << > ICE_AQC_NVM_PRESERVATION_S) > +#define ICE_AQC_NVM_ACTIV_SEL_NVM BIT(3) /* Write Activate/SR > Dump only */ > +#define ICE_AQC_NVM_ACTIV_SEL_OROM BIT(4) > +#define ICE_AQC_NVM_ACTIV_SEL_EXT_TLV BIT(5) > +#define ICE_AQC_NVM_ACTIV_SEL_MASK MAKEMASK(0x7, 3) > #define ICE_AQC_NVM_FLASH_ONLY BIT(7) > __le16 module_typeid; > __le16 length; > @@ -1832,7 +1844,7 @@ struct ice_aqc_get_cee_dcb_cfg_resp { }; >=20 > /* Set Local LLDP MIB (indirect 0x0A08) > - * Used to replace the local MIB of a given LLDP agent. e.g. DCBx > + * Used to replace the local MIB of a given LLDP agent. e.g. DCBX > */ > struct ice_aqc_lldp_set_local_mib { > u8 type; > @@ -1857,7 +1869,7 @@ struct ice_aqc_lldp_set_local_mib_resp { }; >=20 > /* Stop/Start LLDP Agent (direct 0x0A09) > - * Used for stopping/starting specific LLDP agent. e.g. DCBx. > + * Used for stopping/starting specific LLDP agent. e.g. DCBX. > * The same structure is used for the response, with the command field > * being used as the status field. > */ > @@ -2321,6 +2333,7 @@ struct ice_aq_desc { > struct ice_aqc_set_mac_cfg set_mac_cfg; > struct ice_aqc_set_event_mask set_event_mask; > struct ice_aqc_get_link_status get_link_status; > + struct ice_aqc_event_lan_overflow lan_overflow; > } params; > }; >=20 > @@ -2492,10 +2505,14 @@ enum ice_adminq_opc { > /* NVM commands */ > ice_aqc_opc_nvm_read =3D 0x0701, > ice_aqc_opc_nvm_erase =3D 0x0702, > - ice_aqc_opc_nvm_update =3D 0x0703, > + ice_aqc_opc_nvm_write =3D 0x0703, > ice_aqc_opc_nvm_cfg_read =3D 0x0704, > ice_aqc_opc_nvm_cfg_write =3D 0x0705, > ice_aqc_opc_nvm_checksum =3D 0x0706, > + ice_aqc_opc_nvm_write_activate =3D 0x0707, > + ice_aqc_opc_nvm_sr_dump =3D 0x0707, > + ice_aqc_opc_nvm_save_factory_settings =3D 0x0708, > + ice_aqc_opc_nvm_update_empr =3D 0x0709, >=20 > /* LLDP commands */ > ice_aqc_opc_lldp_get_mib =3D 0x0A00, > -- > 2.17.1