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Tue, 12 Dec 2017 10:45:42 +0000 From: Matan Azrad To: Nikhil Agarwal , "dev@dpdk.org" CC: "david.hunt@intel.com" , "nikhil.agarwal@nxp.com" , "hemant.agrawal@nxp.com" , "ferruh.yigit@intel.com" Thread-Topic: [dpdk-dev] [PATCH 1/3] ethdev: add max burst size to device info Thread-Index: AQHTczE+S11cqTZ790yeqByj6Gm9w6M/fvag Date: Tue, 12 Dec 2017 10:45:42 +0000 Message-ID: References: <20171212100520.20502-1-nikhil.agarwal@linaro.org> In-Reply-To: <20171212100520.20502-1-nikhil.agarwal@linaro.org> Accept-Language: en-US, he-IL Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=matan@mellanox.com; x-originating-ip: [193.47.165.251] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; HE1PR0502MB3659; 6:itCunzKLargtou0C1vICya1aTo7XibrpsvOoARwDy59U0NrIzaCb2z6/A5p8ETHXaLDwbOvCH3YpF8TVZzY4Nd4IBNR4aUKw20zA9Mu7gZMDhYGGcqerP6dpopd7xPss3k+RqOGAjrNA5iv7CxwYEd3mQSDUmhGwfOd801CO2o3pEw1ZGbMOkk2iepFUDF4DXRiCg1xkwwtku6q4hq9W47Y6kA6C3V5e7X9bNqH+ByjDtW20cHUbcowRCcpmvM2scv4CO+tGt66kEh32QcFCvRa4TFM1Nuv7Ohrtju7jfz9cr7qzh89C3AXb9nM3MLJf4V6M5Oo8oYaiAsxEzlnhbdZNHo56kMLvP43B2Va85x4=; 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DIR:OUT; SFP:1101; SCL:1; SRVR:HE1PR0502MB3659; H:HE1PR0502MB3659.eurprd05.prod.outlook.com; FPR:; SPF:None; PTR:InfoNoRecords; MX:1; A:1; LANG:en; received-spf: None (protection.outlook.com: mellanox.com does not designate permitted sender hosts) spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7bd41036-d3e9-4f77-c084-08d5414d7e0f X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Dec 2017 10:45:42.4323 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR0502MB3659 Subject: Re: [dpdk-dev] [PATCH 1/3] ethdev: add max burst size to device info X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 12 Dec 2017 10:45:45 -0000 Hi Nikhil > -----Original Message----- > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Nikhil Agarwal > Sent: Tuesday, December 12, 2017 12:05 PM > To: dev@dpdk.org > Cc: david.hunt@intel.com; nikhil.agarwal@nxp.com; > hemant.agrawal@nxp.com; ferruh.yigit@intel.com > Subject: [dpdk-dev] [PATCH 1/3] ethdev: add max burst size to device info >=20 > Currently, if the rte_eth_rx_burst() function returns a value less than > *nb_pkts*, the application will assume that no more packets are present. >=20 > Some of the hw queue based hardware can only support smaller burst for RX > and TX and thus break the expectation of the rx_burst API. > Doesn't such like devices PMDs should try to retrieve multiple HW burst to = adjust the asked received packet number? =20 > This patch adds support to provide the maximum burst size that can be > supported by a given PMD. The dev_info is being memset to '0' in > rte_ethdev library. The value of '0' indicates that any value for burst s= ize can > be supported i.e. no change for existing PMDs. >=20 > The application can now use the lowest available max_burst_size value for > rte_eth_rx_burst. >=20 If you are talking about performance, maybe the right field to expose is so= mething like "perf_burst_size" or "preferred_burst_size". I also suggest to expose different fields for RX and for TX. Maybe the rte_eth_rx\tx_burst() descriptions should be updated.=20 Thanks Matan. > Signed-off-by: Nikhil Agarwal > --- > lib/librte_ether/rte_ethdev.h | 1 + > 1 file changed, 1 insertion(+) >=20 > diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.= h > index 341c2d6..3ab6f02 100644 > --- a/lib/librte_ether/rte_ethdev.h > +++ b/lib/librte_ether/rte_ethdev.h > @@ -1047,6 +1047,7 @@ struct rte_eth_dev_info { > /** Configured number of rx/tx queues */ > uint16_t nb_rx_queues; /**< Number of RX queues. */ > uint16_t nb_tx_queues; /**< Number of TX queues. */ > + uint16_t max_burst_size; /**< MAX burst size, 0 for no limit. */ > }; >=20 > /** > -- > 2.7.4