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Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM5PR0802MB2468 Subject: Re: [dpdk-dev] [PATCH] net/mlx5: fix indexed pool bitmap initialization X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: dev On Behalf Of Suanming Mou > Sent: Tuesday, April 28, 2020 5:14 PM > To: Matan Azrad ; Shahaf Shuler > ; Viacheslav Ovsiienko > > Cc: dev@dpdk.org; rasland@mellanox.com; Lijian Zhang > > Subject: [dpdk-dev] [PATCH] net/mlx5: fix indexed pool bitmap initializat= ion > > Currently, the indexed memory pool bitmap start address is not aligned to > cacheline size explicitly. The bitmap initialization requires the address= should > be cacheline aligned. In that case, the initialization maybe failed if th= e > address is not cacheline aligned. > > Add RTE_CACHE_LINE_ROUNDUP() to the trunk size calculation to make sure > the bitmap offset address will start with cacheline aligned. > > Fixes: a3cf59f56c47 ("net/mlx5: add indexed memory pool") > > Signed-off-by: Suanming Mou > Tested-by: Lijian Zhang > Acked-by: Viacheslav Ovsiienko > --- > drivers/net/mlx5/mlx5_utils.c | 10 +++++++--- > drivers/net/mlx5/mlx5_utils.h | 2 +- > 2 files changed, 8 insertions(+), 4 deletions(-) > > diff --git a/drivers/net/mlx5/mlx5_utils.c b/drivers/net/mlx5/mlx5_utils.= c > index 2146ffd..d29fbcb 100644 > --- a/drivers/net/mlx5/mlx5_utils.c > +++ b/drivers/net/mlx5/mlx5_utils.c > @@ -265,7 +265,9 @@ struct mlx5_indexed_pool * > trunk_size +=3D sizeof(*trunk); > data_size =3D mlx5_trunk_size_get(pool, idx); > bmp_size =3D rte_bitmap_get_memory_footprint(data_size); > -trunk_size +=3D data_size * pool->cfg.size + bmp_size; > +/* rte_bitmap requires memory cacheline aligned. */ > +trunk_size +=3D RTE_CACHE_LINE_ROUNDUP(data_size * pool- > >cfg.size); > +trunk_size +=3D bmp_size; > trunk =3D pool->cfg.malloc(pool->cfg.type, trunk_size, > RTE_CACHE_LINE_SIZE, rte_socket_id()); > if (!trunk) > @@ -278,8 +280,10 @@ struct mlx5_indexed_pool * > MLX5_ASSERT(pool->free_list =3D=3D TRUNK_INVALID); > pool->free_list =3D idx; > /* Mark all entries as available. */ > -trunk->bmp =3D rte_bitmap_init_with_all_set(data_size, > - &trunk->data[data_size * pool->cfg.size], bmp_size); > +trunk->bmp =3D rte_bitmap_init_with_all_set(data_size, &trunk->data > + [RTE_CACHE_LINE_ROUNDUP(data_size * pool->cfg.size)], > + bmp_size); > +MLX5_ASSERT(trunk->bmp); > pool->n_trunk_valid++; > #ifdef POOL_DEBUG > pool->trunk_new++; > diff --git a/drivers/net/mlx5/mlx5_utils.h b/drivers/net/mlx5/mlx5_utils.= h > index d81ace3..1248caa 100644 > --- a/drivers/net/mlx5/mlx5_utils.h > +++ b/drivers/net/mlx5/mlx5_utils.h > @@ -115,7 +115,7 @@ struct mlx5_indexed_trunk { > uint32_t next; /* Next free trunk in free list. */ > uint32_t free; /* Free entries available */ > struct rte_bitmap *bmp; > -uint8_t data[] __rte_cache_min_aligned; /* Entry data start. */ > +uint8_t data[] __rte_cache_aligned; /* Entry data start. */ > }; > > struct mlx5_indexed_pool { > -- > 1.8.3.1 Reviewed-by: Ruifeng Wang IMPORTANT NOTICE: The contents of this email and any attachments are confid= ential and may also be privileged. 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