From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id BF77CA04C1; Mon, 10 Aug 2020 07:22:30 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C33762986; Mon, 10 Aug 2020 07:22:29 +0200 (CEST) Received: from FRA01-MR2-obe.outbound.protection.outlook.com (mail-eopbgr90052.outbound.protection.outlook.com [40.107.9.52]) by dpdk.org (Postfix) with ESMTP id A0014288C for ; Mon, 10 Aug 2020 07:22:28 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=uX1lAArh9bb/QWtx9DF9wiCPJT9BR7y3+vy/cx2eCn0=; b=nH8NRQsOQ7FWD/GqxncZHo5ad8DGCEMSvlufKp3HzKNhhUsdimD3XeHvFf9hZFSdZ0GfryQtmult/GKkADZs2895wfFiRT9RDKHwXdkAPx1IR7WJFIMo0HIdNRW2REkGWVn365EklCF1HoMH8FQw7RLNG8bB0BN04IvLvwt1Rdg= Received: from DB6PR0501CA0019.eurprd05.prod.outlook.com (2603:10a6:4:8f::29) by PR2PR08MB4843.eurprd08.prod.outlook.com (2603:10a6:101:24::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3261.15; Mon, 10 Aug 2020 05:22:26 +0000 Received: from DB5EUR03FT012.eop-EUR03.prod.protection.outlook.com (2603:10a6:4:8f:cafe::46) by DB6PR0501CA0019.outlook.office365.com (2603:10a6:4:8f::29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3261.16 via Frontend Transport; Mon, 10 Aug 2020 05:22:26 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; dpdk.org; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com;dpdk.org; dmarc=bestguesspass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 63.35.35.123 as permitted sender) receiver=protection.outlook.com; client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com; Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by DB5EUR03FT012.mail.protection.outlook.com (10.152.20.161) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3261.16 via Frontend Transport; Mon, 10 Aug 2020 05:22:26 +0000 Received: ("Tessian outbound 34b830c8a0ef:v64"); Mon, 10 Aug 2020 05:22:26 +0000 X-CR-MTA-TID: 64aa7808 Received: from 6e64bb9d1cfd.1 by 64aa7808-outbound-1.mta.getcheckrecipient.com id E6EC139C-399F-4672-B171-43C6B9AC58BD.1; Mon, 10 Aug 2020 05:22:21 +0000 Received: from EUR05-DB8-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id 6e64bb9d1cfd.1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Mon, 10 Aug 2020 05:22:21 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=ldZXFaI+1DFAJeK7dcHwTLUGtZowlLj21PDiYZyQ/ijUiW2wwy7sXug/ZCpGgf1AdxQy2/wvkOjSemtTOhSNmanurgxd06cBJ/87cuCHIiB1+2e/S/4KaOWgFtbm0daAvOA9uEbDwi4VX2rgxbsxl4kbEh/GB+6DmmdFffp22aDNopCRAvm8Oclik7C6z2DdBKRC98pf08WBxQXPoZruXE2wxO/GqL+dG5uHZyehvDaPGgFQ/KOlA0ueK9E7d+u25My33RwSv/dZmG0LCojh2AcU0//XI4ICPmwQf+fQwgoo5FMBh9WabnegKdLwVaXeQfqH/dkRkR6Q/djQttKhDw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=uX1lAArh9bb/QWtx9DF9wiCPJT9BR7y3+vy/cx2eCn0=; b=G8Kaza9s5UITgLV+5t9UMw15Jhoi6vQ/vlKrCWEakdyvFWFRJto9EcibGl1vOdIr3Eb0WyN7IGkRA4paL/G89dO9/yewekCpQRsiX9qu18z3xOOG+y0E7vHGhdm1CeDPolFQ6Mkl9duVspi23KUq0puXUMqcB7NkAsbfJjahvJ2p0ZXYOydafu5rwLIB6kMlslbDJ+CD7/lvsyQ1LlERW5CYdmTq9JxO/Oq9RzXMDsJobM6CzSIYSl37mlf3V3btYHl4bHMfX8ioZcT9VC/NleianALeNKVOC3ZMUj9hLronkfGLuLUiVdRwlmlmsCREr/5ZJWXL6q1sJ7R69kZWgQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=arm.com; dmarc=pass action=none header.from=arm.com; dkim=pass header.d=arm.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=uX1lAArh9bb/QWtx9DF9wiCPJT9BR7y3+vy/cx2eCn0=; b=nH8NRQsOQ7FWD/GqxncZHo5ad8DGCEMSvlufKp3HzKNhhUsdimD3XeHvFf9hZFSdZ0GfryQtmult/GKkADZs2895wfFiRT9RDKHwXdkAPx1IR7WJFIMo0HIdNRW2REkGWVn365EklCF1HoMH8FQw7RLNG8bB0BN04IvLvwt1Rdg= Received: from HE1PR0801MB2025.eurprd08.prod.outlook.com (2603:10a6:3:50::14) by HE1PR0802MB2603.eurprd08.prod.outlook.com (2603:10a6:3:e0::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3261.19; Mon, 10 Aug 2020 05:22:19 +0000 Received: from HE1PR0801MB2025.eurprd08.prod.outlook.com ([fe80::e863:15c9:b803:6533]) by HE1PR0801MB2025.eurprd08.prod.outlook.com ([fe80::e863:15c9:b803:6533%7]) with mapi id 15.20.3261.024; Mon, 10 Aug 2020 05:22:19 +0000 From: Ruifeng Wang To: Ciara Power , "dev@dpdk.org" CC: "bruce.richardson@intel.com" , "jerinj@marvell.com" , Honnappa Nagarahalli , David Christensen , nd Thread-Topic: [PATCH 20.11 02/12] eal: add default SIMD bitwidth values Thread-Index: AQHWbNS9HvfUYa7cCkurFJ/g/Tmslakw0gdg Date: Mon, 10 Aug 2020 05:22:18 +0000 Message-ID: References: <20200807155859.63888-1-ciara.power@intel.com> <20200807155859.63888-3-ciara.power@intel.com> In-Reply-To: <20200807155859.63888-3-ciara.power@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ts-tracking-id: 78271838-2e25-45e2-bf56-c1a52405ef9e.0 x-checkrecipientchecked: true Authentication-Results-Original: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=arm.com; x-originating-ip: [203.126.0.111] x-ms-publictraffictype: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 7d147bfd-4c6e-42a8-790e-08d83ced5eb7 x-ms-traffictypediagnostic: HE1PR0802MB2603:|PR2PR08MB4843: x-ld-processed: f34e5979-57d9-4aaa-ad4d-b122a662184d,ExtAddr x-ms-exchange-transport-forked: True X-Microsoft-Antispam-PRVS: x-checkrecipientrouted: true nodisclaimer: true x-ms-oob-tlc-oobclassifiers: OLM:6430;OLM:6430; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: Mbl3Wuk92y1xPqNSWacXf//UuWjoYXtC2UmaIJJwSMQAVuhAMEv9AGIYoKdSHXwx3oSwD7ecYTK6oc4AIYvE2Y8Zkk16Tct/hyagUMAW9PfEq8E4peet/8lAk4kHUrKV2n9qt8EtwTgP98sqK/uoCXayi6GkSP0cyMVmrHONaJn3AssjsF8pGmbUk8dXhsYT8S4sZZUUIHND/JwX83P2Mpru9eDvwOxLJLob+CfTaY7kvVbniDGxIhVHtLwu3OWdfhcKCcuOUi74usGnSkYUrDGkzbVSRuhImUg1ohEGKHoP05VjDJpHv2kJbtGW6c+3 X-Forefront-Antispam-Report-Untrusted: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:HE1PR0801MB2025.eurprd08.prod.outlook.com; PTR:; CAT:NONE; SFTY:; SFS:(4636009)(136003)(366004)(376002)(39850400004)(396003)(346002)(71200400001)(7696005)(4326008)(316002)(66446008)(64756008)(6506007)(76116006)(66556008)(66476007)(53546011)(66946007)(110136005)(26005)(83380400001)(54906003)(478600001)(86362001)(8676002)(33656002)(8936002)(55016002)(186003)(9686003)(2906002)(52536014)(5660300002); DIR:OUT; SFP:1101; x-ms-exchange-antispam-messagedata: nXIf9sqHP0oiArSsA9TDOW1Up05lHecvbQzRkzArG7JBPQ/4V7y0mLSedrsFw19OckaZZmPtmTPh1efo0GwpPb2hWQy7HQphHBzIRzUJDZDO0jTudimZhmUUJ8dBm0qyupYPyoYRrw4ixISdvw6wLEhh0JGwzTGOoY4Cw1EfNAcWCm008wiJt52FFRRKdOrZzIVk6nwF7UBmwHUJBFbtOhimafEB5eGqRf4ahdpaUhje6GM8u8PYjHEyKh1nhw+9b+sQ+wUyxl9QHh7fFUfFMjDejawt5Y5uGixsClDi1BDH2vOf86+gIm6lXCCmn0aepdC3x2OAnuNce5MKnnOKD+PLZuMa7/4ZO1XHXkbtCWcMJsZnGKUrsLCtS4uCIUq1QPHURgez12FWV8Y0y1kQkUhop+zJK/prCIIY1tqUZoAHKzeRPC4N/dNEg8VrOkXfctAKKP7tp7wUKxoHl3AT2aZWb1GM1/l0fnejZZCqU1NM1zIc2nw8ryajAaGNGU9qpnoRAU659cVV5JUk6qk6PW/qAHOJnrZfBylELZntfkEfXxiMXiQmqri+fxjpQM69uubenSJBEHSDExECrdIGF22zgX4T6cXA1zCxwCsWevENSdtI3Pk72DXvTwD9rij2NAsewyvE+NPW/hdU7oO36w== Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR0802MB2603 Original-Authentication-Results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=arm.com; X-EOPAttributedMessage: 0 X-MS-Exchange-Transport-CrossTenantHeadersStripped: DB5EUR03FT012.eop-EUR03.prod.protection.outlook.com X-MS-Office365-Filtering-Correlation-Id-Prvs: c2fc4eb4-3138-4667-5930-08d83ced5a5b X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: /VqpjtnUsfLAQOdVO8eDv+fmkVzwcYV7LFKkf1fNmzL6PqPxc0DekTgbxB1Oi+9bmUjbHbXWe5YIl3ipldW0TYNoyEHXrqb5DMkrn0zDqBOeEhxMcSB5bPpFR6dfwixaGZNQpRgMnEZAmZ0ZFWlrQR3PiPF1HrW5XNquz21IFp/CT4ZJrU3oa1zwTM5hYy8NYORNlCAClhV4BmcSIr6P9HSaY3jZKoxSAtZP00+lBrSfwtqNfLypxwo14nal+78lqknX5IKtiO+JPuCGrZ48ew/xzrb891ezsWvlhT5voiw4F3ct00uOYC+n2qW4QGNOe6GfvKLZS3tyAjaiwha4w6ZPr9JBGNjnrCGLTS0ydFOpATx5pYTHszMn889ShJkA0p95lqHeSo423t0KKTlm6w== X-Forefront-Antispam-Report: CIP:63.35.35.123; CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFTY:; SFS:(4636009)(376002)(39850400004)(396003)(346002)(136003)(46966005)(110136005)(9686003)(54906003)(47076004)(82740400003)(26005)(186003)(82310400002)(81166007)(356005)(316002)(478600001)(52536014)(2906002)(8676002)(336012)(5660300002)(8936002)(7696005)(70206006)(55016002)(86362001)(70586007)(6506007)(53546011)(4326008)(33656002)(83380400001); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Aug 2020 05:22:26.6863 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7d147bfd-4c6e-42a8-790e-08d83ced5eb7 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DB5EUR03FT012.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PR2PR08MB4843 Subject: Re: [dpdk-dev] [PATCH 20.11 02/12] eal: add default SIMD bitwidth values X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Ciara Power > Sent: Friday, August 7, 2020 11:59 PM > To: dev@dpdk.org > Cc: bruce.richardson@intel.com; Ciara Power ; > Ruifeng Wang ; jerinj@marvell.com; Honnappa > Nagarahalli ; David Christensen > > Subject: [PATCH 20.11 02/12] eal: add default SIMD bitwidth values >=20 > Each arch has a define for the default SIMD bitwidth value, this is used = on EAL > init to set the config max SIMD bitwidth. >=20 > Cc: Ruifeng Wang > Cc: Jerin Jacob > Cc: Honnappa Nagarahalli > Cc: David Christensen >=20 > Signed-off-by: Ciara Power > --- > lib/librte_eal/arm/include/rte_vect.h | 2 ++ > lib/librte_eal/common/eal_common_options.c | 3 +++ > lib/librte_eal/include/generic/rte_vect.h | 2 ++ > lib/librte_eal/ppc/include/rte_vect.h | 2 ++ > lib/librte_eal/x86/include/rte_vect.h | 2 ++ > 5 files changed, 11 insertions(+) >=20 > diff --git a/lib/librte_eal/arm/include/rte_vect.h > b/lib/librte_eal/arm/include/rte_vect.h > index 01c51712a1..7487a53862 100644 > --- a/lib/librte_eal/arm/include/rte_vect.h > +++ b/lib/librte_eal/arm/include/rte_vect.h > @@ -14,6 +14,8 @@ > extern "C" { > #endif >=20 > +#define RTE_DEFAULT_SIMD_BITWIDTH 256 I think for arm platform we should set it to '128'. It is the bit width of = NEON registers. > + > typedef int32x4_t xmm_t; >=20 > #define XMM_SIZE (sizeof(xmm_t)) > diff --git a/lib/librte_eal/common/eal_common_options.c > b/lib/librte_eal/common/eal_common_options.c > index 90f4e8f5c3..c2a9624f89 100644 > --- a/lib/librte_eal/common/eal_common_options.c > +++ b/lib/librte_eal/common/eal_common_options.c > @@ -35,6 +35,7 @@ > #ifndef RTE_EXEC_ENV_WINDOWS > #include > #endif > +#include >=20 > #include "eal_internal_cfg.h" > #include "eal_options.h" > @@ -344,6 +345,8 @@ eal_reset_internal_config(struct internal_config > *internal_cfg) > internal_cfg->user_mbuf_pool_ops_name =3D NULL; > CPU_ZERO(&internal_cfg->ctrl_cpuset); > internal_cfg->init_complete =3D 0; > + internal_cfg->max_simd_bitwidth.bitwidth =3D > RTE_DEFAULT_SIMD_BITWIDTH; > + internal_cfg->max_simd_bitwidth.locked =3D 0; > } >=20 > static int > diff --git a/lib/librte_eal/include/generic/rte_vect.h > b/lib/librte_eal/include/generic/rte_vect.h > index 3fc47979f8..e98f184a97 100644 > --- a/lib/librte_eal/include/generic/rte_vect.h > +++ b/lib/librte_eal/include/generic/rte_vect.h > @@ -14,6 +14,8 @@ >=20 > #include >=20 > +#define RTE_DEFAULT_SIMD_BITWIDTH 256 > + > /* Unsigned vector types */ >=20 > /** > diff --git a/lib/librte_eal/ppc/include/rte_vect.h > b/lib/librte_eal/ppc/include/rte_vect.h > index b0545c878c..70fbd0c423 100644 > --- a/lib/librte_eal/ppc/include/rte_vect.h > +++ b/lib/librte_eal/ppc/include/rte_vect.h > @@ -15,6 +15,8 @@ > extern "C" { > #endif >=20 > +#define RTE_DEFAULT_SIMD_BITWIDTH 256 > + > typedef vector signed int xmm_t; >=20 > #define XMM_SIZE (sizeof(xmm_t)) > diff --git a/lib/librte_eal/x86/include/rte_vect.h > b/lib/librte_eal/x86/include/rte_vect.h > index df5a607623..b1df75aca7 100644 > --- a/lib/librte_eal/x86/include/rte_vect.h > +++ b/lib/librte_eal/x86/include/rte_vect.h > @@ -35,6 +35,8 @@ > extern "C" { > #endif >=20 > +#define RTE_DEFAULT_SIMD_BITWIDTH 256 > + > typedef __m128i xmm_t; >=20 > #define XMM_SIZE (sizeof(xmm_t)) > -- > 2.17.1