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Mon, 15 Jan 2018 10:57:18 +0000 From: Herbert Guan To: Thomas Monjalon CC: "dev@dpdk.org" , "jerin.jacob@caviumnetworks.com" , nd Thread-Topic: [dpdk-dev] [PATCH v5] arch/arm: optimization for memcpy on AArch64 Thread-Index: AQHThUWgmAuDLp921EqY4XB8TxlRu6NwhBQAgAPMYXA= Date: Mon, 15 Jan 2018 10:57:18 +0000 Message-ID: References: <1511768985-21639-1-git-send-email-herbert.guan@arm.com> <1515061208-27252-1-git-send-email-herbert.guan@arm.com> <3668269.EoJLONrpA4@xps> In-Reply-To: <3668269.EoJLONrpA4@xps> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Herbert.Guan@arm.com; x-originating-ip: [113.29.88.7] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; HE1PR08MB2812; 7:QqDrazsaVHacfRpOsZ343KDsZKs3ifV2IXp55U5copHdrSCHS66speyb1CDbRwcjRzbl/vXSkH2kOv3ZtcKiPm+6hKQ5vm/Rdwjui+XKPu77pC9Dwcp7HJ+6ytHnL6AZFC0ZZD6FrdNoBSg2TDs1HG0jKqL07Qx21eXPA8EPBKuH6LNE0n68iO7bzni3GtjVfEtvU2pBfo1zeLjt3rU3VkH4e9GkQbrwCVVCNJT4EWS/DtIhxrfgNVvYnKf1jBEf x-ms-exchange-antispam-srfa-diagnostics: SSOS; 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DIR:OUT; SFP:1101; SCL:1; SRVR:HE1PR08MB2812; H:HE1PR08MB2809.eurprd08.prod.outlook.com; FPR:; SPF:None; PTR:InfoNoRecords; MX:1; A:1; LANG:en; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: 12Gw3BkvTnSTK1+Nu+9nXFBu05ZzzFFVYJlhsGCv7Ior2oHMF2zR8cdG00oCKXB+oGDPhNizwb5rYY5j5DscOg== spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: dcaf791c-ac69-4d5e-8b31-08d55c06bf27 X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Jan 2018 10:57:18.7673 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR08MB2812 Subject: Re: [dpdk-dev] [PATCH v5] arch/arm: optimization for memcpy on AArch64 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 15 Jan 2018 10:57:21 -0000 Hi Thomas, > -----Original Message----- > From: Thomas Monjalon [mailto:thomas@monjalon.net] > Sent: Saturday, January 13, 2018 1:04 > To: Herbert Guan > Cc: dev@dpdk.org; jerin.jacob@caviumnetworks.com > Subject: Re: [dpdk-dev] [PATCH v5] arch/arm: optimization for memcpy on > AArch64 >=20 > Hi, >=20 > All the code is using ARM64, but the title suggests AArch64. > What is the difference between AArch64 and ARM64 (and ARMv8)? AArch64 and ARM64 refer to the same thing. AArch64 refers to the 64-bit ar= chitecture introduced since ARMv8-A. But the Linux kernel community calls = it as ARM64. As to DPDK, in most existing compile flags, ARM64 is used. S= o this patch keeps the ARM64 naming in newly added compile options. >=20 > 04/01/2018 11:20, Herbert Guan: > > +/************************************** > > + * Beginning of customization section > > +**************************************/ > > +#define RTE_ARM64_MEMCPY_ALIGN_MASK 0x0F #ifndef > > +RTE_ARCH_ARM64_MEMCPY_STRICT_ALIGN > > +/* Only src unalignment will be treaed as unaligned copy */ >=20 > typo: treaed It should be 'treated'. Will correct it in the next version. >=20 > > +#define RTE_ARM64_MEMCPY_IS_UNALIGNED_COPY(dst, src) \ > > + ((uintptr_t)(dst) & RTE_ARM64_MEMCPY_ALIGN_MASK) #else > > +/* Both dst and src unalignment will be treated as unaligned copy */ > > +#define RTE_ARM64_MEMCPY_IS_UNALIGNED_COPY(dst, src) \ > > + (((uintptr_t)(dst) | (uintptr_t)(src)) & > > +RTE_ARM64_MEMCPY_ALIGN_MASK) #endif > > + > > + > > +/* > > + * If copy size is larger than threshold, memcpy() will be used. > > + * Run "memcpy_perf_autotest" to determine the proper threshold. > > + */ > > +#define RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD > ((size_t)(0xffffffff)) > > +#define RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD > ((size_t)(0xffffffff)) > > + > > +/* > > + * The logic of USE_RTE_MEMCPY() can also be modified to best fit > platform. > > + */ > > +#define USE_RTE_MEMCPY(dst, src, n) \ > > +((!RTE_ARM64_MEMCPY_IS_UNALIGNED_COPY(dst, src) && \ n <=3D > > +RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD) \ > > +|| (RTE_ARM64_MEMCPY_IS_UNALIGNED_COPY(dst, src) && \ > > +n <=3D RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD)) > > + > > +/************************************** > > + * End of customization section > > + **************************************/ >=20 > Modifying the code to asjust the platform is not easy for deployment. > Can we move some customization variables inside the configuration file? RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD and RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD= are the 2 parameters can be configured during build-time. The values can = be specified with the best values for the target platform. Usually it's no= t necessary to change the expression, the comment added in the code is just= to raise the hint that this code piece can be modified. =20 Best regards, Herbert