RE: [PATCH v1 1/2] net/axgbe: add support for Yellow Carp ethernet device

["Namburu, Chandu-babu" <chandu@amd.com>]

[Public]



-----Original Message-----
From: Sebastian, Selwin <Selwin.Sebastian@amd.com> 
Sent: Monday, January 31, 2022 11:09 AM
To: dev@dpdk.org
Cc: Namburu, Chandu-babu <chandu@amd.com>; ferruh.yigit@intel.com
Subject: [PATCH v1 1/2] net/axgbe: add support for Yellow Carp ethernet device

From: Selwin Sebastian <selwin.sebastian@amd.com>

Yellow Carp ethernet devices (V3xxx) use the existing PCI ID but the window settings for the indirect PCS access have been altered. Add the check for Yellow Carp Ethernet devices to use the new register values.

Signed-off-by: Selwin Sebastian <selwin.sebastian@amd.com>
---
 drivers/net/axgbe/axgbe_common.h |  2 ++  drivers/net/axgbe/axgbe_ethdev.c | 34 +++++++++++++++++++++-----------
 2 files changed, 25 insertions(+), 11 deletions(-)

diff --git a/drivers/net/axgbe/axgbe_common.h b/drivers/net/axgbe/axgbe_common.h
index 5310ac54f5..b9ebf64fb8 100644
--- a/drivers/net/axgbe/axgbe_common.h
+++ b/drivers/net/axgbe/axgbe_common.h
@@ -901,6 +901,8 @@
 #define PCS_V2_WINDOW_SELECT		0x9064
 #define PCS_V2_RV_WINDOW_DEF		0x1060
 #define PCS_V2_RV_WINDOW_SELECT		0x1064
+#define PCS_V2_YC_WINDOW_DEF		0x18060
+#define PCS_V2_YC_WINDOW_SELECT		0x18064
 
 /* PCS register entry bit positions and sizes */
 #define PCS_V2_WINDOW_DEF_OFFSET_INDEX	6
diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c
index e9546469f3..2be9387f98 100644
--- a/drivers/net/axgbe/axgbe_ethdev.c
+++ b/drivers/net/axgbe/axgbe_ethdev.c
@@ -173,6 +173,8 @@ static const struct axgbe_xstats axgbe_xstats_strings[] = {
 /* The set of PCI devices this driver supports */
 #define AMD_PCI_VENDOR_ID       0x1022
 #define AMD_PCI_RV_ROOT_COMPLEX_ID	0x15d0
+#define AMD_PCI_YC_ROOT_COMPLEX_ID	0x14b5
+#define AMD_PCI_SNOWY_ROOT_COMPLEX_ID	0x1450
 #define AMD_PCI_AXGBE_DEVICE_V2A 0x1458  #define AMD_PCI_AXGBE_DEVICE_V2B 0x1459
 
@@ -2178,17 +2180,6 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
 	pci_dev = RTE_DEV_TO_PCI(eth_dev->device);
 	pdata->pci_dev = pci_dev;
 
-	/*
-	 * Use root complex device ID to differentiate RV AXGBE vs SNOWY AXGBE
-	 */
-	if ((get_pci_rc_devid()) == AMD_PCI_RV_ROOT_COMPLEX_ID) {
-		pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;
-		pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;
-	} else {
-		pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
-		pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
-	}
-
 	pdata->xgmac_regs =
 		(void *)pci_dev->mem_resource[AXGBE_AXGMAC_BAR].addr;
 	pdata->xprop_regs = (void *)((uint8_t *)pdata->xgmac_regs @@ -2203,6 +2194,27 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev)
 	else
 		pdata->vdata = &axgbe_v2b;
 
+	/*
+	 * Use PCI root complex device ID to identify the CPU
+	 */
+	switch (get_pci_rc_devid()) {
+	case AMD_PCI_RV_ROOT_COMPLEX_ID:
+		pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF;
+		pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT;
+		break;
+	case AMD_PCI_YC_ROOT_COMPLEX_ID:
+		pdata->xpcs_window_def_reg = PCS_V2_YC_WINDOW_DEF;
+		pdata->xpcs_window_sel_reg = PCS_V2_YC_WINDOW_SELECT;
+		break;
+	case AMD_PCI_SNOWY_ROOT_COMPLEX_ID:
+		pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF;
+		pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT;
+		break;
+	default:
+		PMD_DRV_LOG(ERR, "No supported devices found\n");
+		return -ENODEV;
+	}
+
 	/* Configure the PCS indirect addressing support */
 	reg = XPCS32_IOREAD(pdata, pdata->xpcs_window_def_reg);
 	pdata->xpcs_window = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, OFFSET);
--
2.25.1

For series,
Acked-by: Chandubabu Namburu <chandu@amd.com>