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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MW2PR12MB2538.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 460d2f49-52c5-4e7c-5872-08d9df5835f0 X-MS-Exchange-CrossTenant-originalarrivaltime: 24 Jan 2022 16:40:20.2820 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: +c5FBua5Tm0NAGqdgEFyAuPA9mZg31CLJH914OP6cO66z9pG9Yt/iTBT2WcZf5iMzrz2XKNxJ1yXuH4U5jGzWg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4525 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org [Public] Acked-by: Chandubabu Namburu -----Original Message----- From: ssebasti@amd.com =20 Sent: Monday, January 10, 2022 5:05 PM To: dev@dpdk.org Subject: [PATCH v1 4/6] net/axgbe: reset PHY Rx when mailbox command timeou= t From: Selwin Sebastian Sometimes mailbox commands timeout when the RX data path becomes unresponsi= ve. This prevents the submission of new mailbox commands to DXIO. This patc= h identifies the timeout and resets the RX data path so that the next messa= ge can be submitted properly. Signed-off-by: Selwin Sebastian --- drivers/net/axgbe/axgbe_common.h | 14 ++++++++++++++ drivers/net/axgbe/axgbe_phy_impl.c | 29 ++++++++++++++++++++++++++++- 2 files changed, 42 insertions(+), 1 deletion(-) diff --git a/drivers/net/axgbe/axgbe_common.h b/drivers/net/axgbe/axgbe_com= mon.h index 5a7ac35b6a..a5431dd998 100644 --- a/drivers/net/axgbe/axgbe_common.h +++ b/drivers/net/axgbe/axgbe_common.h @@ -1270,10 +1270,18 @@ #define MDIO_PMA_10GBR_FECCTRL 0x00ab #endif =20 +#ifndef MDIO_PMA_RX_CTRL1 +#define MDIO_PMA_RX_CTRL1 0x8051 +#endif + #ifndef MDIO_PCS_DIG_CTRL #define MDIO_PCS_DIG_CTRL 0x8000 #endif =20 +#ifndef MDIO_PCS_DIGITAL_STAT +#define MDIO_PCS_DIGITAL_STAT 0x8010 +#endif + #ifndef MDIO_AN_XNP #define MDIO_AN_XNP 0x0016 #endif @@ -1354,6 +1362,8 @@ #define AXGBE_KR_TRAINING_ENABLE BIT(1) =20 #define AXGBE_PCS_CL37_BP BIT(12) +#define XGBE_PCS_PSEQ_STATE_MASK 0x1c +#define XGBE_PCS_PSEQ_STATE_POWER_GOOD 0x10 =20 #define AXGBE_AN_CL37_INT_CMPLT BIT(0) #define AXGBE_AN_CL37_INT_MASK 0x01 @@ -1401,6 +1411,10 @@ static inline uint32_t high32_value(uint64_t addr) #define XGBE_PMA_PLL_CTRL_SET BIT(15) #define XGBE_PMA_PLL_CTRL_CLEAR 0x0000 =20 +#define XGBE_PMA_RX_RST_0_MASK BIT(4) +#define XGBE_PMA_RX_RST_0_RESET_ON 0x10 +#define XGBE_PMA_RX_RST_0_RESET_OFF 0x00 + /*END*/ =20 /* Bit setting and getting macros diff --git a/drivers/net/axgbe/axgbe_phy_impl.c b/drivers/net/axgbe/axgbe_p= hy_impl.c index 0894dbf74b..e52dbb9585 100644 --- a/drivers/net/axgbe/axgbe_phy_impl.c +++ b/drivers/net/axgbe/axgbe_phy_impl.c @@ -1196,6 +1196,28 @@ static void axgbe_phy_set_redrv_mode(struct axgbe_po= rt *pdata) axgbe_phy_put_comm_ownership(pdata); } =20 +static void axgbe_phy_rx_reset(struct axgbe_port *pdata) { + int reg; + + reg =3D XMDIO_READ_BITS(pdata, MDIO_MMD_PCS, MDIO_PCS_DIGITAL_STAT, + XGBE_PCS_PSEQ_STATE_MASK); + if (reg =3D=3D XGBE_PCS_PSEQ_STATE_POWER_GOOD) { + /* Mailbox command timed out, reset of RX block is required. + * This can be done by asseting the reset bit and wait for + * its compeletion. + */ + XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_CTRL1, + XGBE_PMA_RX_RST_0_MASK, XGBE_PMA_RX_RST_0_RESET_ON); + rte_delay_us(20); + XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_CTRL1, + XGBE_PMA_RX_RST_0_MASK, XGBE_PMA_RX_RST_0_RESET_OFF); + rte_delay_us(45); + PMD_DRV_LOG(ERR, "firmware mailbox reset performed\n"); + } +} + + static void axgbe_phy_pll_ctrl(struct axgbe_port *pdata, bool enable) { XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_VEND2_PMA_MISC_CTRL0, @@ -1= 216,8 +1238,10 @@ static void axgbe_phy_perform_ratechange(struct axgbe_por= t *pdata, axgbe_phy_pll_ctrl(pdata, false); =20 /* Log if a previous command did not complete */ - if (XP_IOREAD_BITS(pdata, XP_DRIVER_INT_RO, STATUS)) + if (XP_IOREAD_BITS(pdata, XP_DRIVER_INT_RO, STATUS)) { PMD_DRV_LOG(NOTICE, "firmware mailbox not ready for command\n"); + axgbe_phy_rx_reset(pdata); + } =20 /* Construct the command */ XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, COMMAND, cmd); @@ -1235,6 +1259,9 @@= static void axgbe_phy_perform_ratechange(struct axgbe_port *pdata, goto reenable_pll; rte_delay_us(1500); } + PMD_DRV_LOG(NOTICE, "firmware mailbox command did not complete\n"); + /* Reset on error */ + axgbe_phy_rx_reset(pdata); =20 reenable_pll: /* Re-enable the PLL control */ -- 2.25.1