From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6D17AA0573; Thu, 5 Mar 2020 11:20:36 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id ADB5B1BFCE; Thu, 5 Mar 2020 11:20:35 +0100 (CET) Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on2088.outbound.protection.outlook.com [40.107.93.88]) by dpdk.org (Postfix) with ESMTP id 426C02BA8 for ; Thu, 5 Mar 2020 11:20:34 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=B8rjtV1lHN2HLGkJ4GmXkRkbh9S0OvFIGrJHP7g7hvhSBhaKzTMQl4DETfANgAPQ6hh/qV0AZmJa1OfdorijNE6F+4QYQH1Ed3+B4mxRsQA3VARF4QvNH9YR+JGcRlMzXyOiz+ziUeRCrY5dE21EIAdsTxS+XERB4fRfk+mdw9Yww1xDOnkeyd9VjhvMkLTjJaV69oEr4agvfj9OUb9NTNEvRjMjebHWJdPhIdPo533L4j/XmbI0F2Uk19XN5LRfEmn4jxjBHO1DKWQPTtyZbDFwUB25cBxp+W8hebuAQ2yNOhwNf2Dk+0Sdz/ddcT9YdWdXsdSUGxFW/t8sFVe/wQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=cxpPi7u/7QawSyNGeq61eZUYCGF5U63ckMI4S86jxXE=; b=etmdv4OWWgfcvYumTrJnPSF8OsO2bRekF6bTO17RPhwBxpiHUobj3ZZy4VQgCDBOWuVkrkwAF9kFzENAgZS6c8BzG8ZdIj8dxjmc1e/EoU9uzxsqMd3xjjtMuenhkGItvu49PdYUSjgwDTVLQDKyI4gp87uLN0dUvoKvz/6lk0leGAwqLyxlW60/S77V6PY3TiOyGY9mz+/w+3+ou+sbgHwhA9DHBLWdPL+shlV8Il837eae6gH6DU7/nBEQwZyd/dbs6dEfK0cUf/yX74jwxI8txUfcS5Uv7+NYw6FwTQ0OziiTz5EigmxdVgBqsQLEchwjrJKrMQBa5mi2J+HwbQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=amd.com; dmarc=pass action=none header.from=amd.com; dkim=pass header.d=amd.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector2-amdcloud-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=cxpPi7u/7QawSyNGeq61eZUYCGF5U63ckMI4S86jxXE=; b=cIq+m7Q17okkhx2XvzrSHrMqV8tFoVxsPLYLZFd2w7QzF3wQvDFe3AJ+71komvM1s/u8D1nHOmDcTodK7cHez9PA9LGjR/0B1hgW7qduA5aPL3mdntEAucqnJ8YRTdWTp1K/B7hKZrZJ2VjGB4t6dbw6KxMtJpfnL9qfoxyORz8= Received: from MW2PR12MB2570.namprd12.prod.outlook.com (2603:10b6:907:a::13) by MW2PR12MB2460.namprd12.prod.outlook.com (2603:10b6:907:9::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2772.18; Thu, 5 Mar 2020 10:20:31 +0000 Received: from MW2PR12MB2570.namprd12.prod.outlook.com ([fe80::218a:b130:80a9:9e3f]) by MW2PR12MB2570.namprd12.prod.outlook.com ([fe80::218a:b130:80a9:9e3f%7]) with mapi id 15.20.2793.013; Thu, 5 Mar 2020 10:20:31 +0000 From: "Kumar, Ravi1" To: "Sebastian, Selwin" , "dev@dpdk.org" Thread-Topic: [PATCH v1] net/axgbe: add support for Scattered Rx Thread-Index: AQHV69jCO8y2tkyAT0CNdGHN1TR826gs+OnwgAzfL6A= Date: Thu, 5 Mar 2020 10:20:31 +0000 Message-ID: References: <20200225124004.26946-1-ssebasti@amd.com> In-Reply-To: Accept-Language: en-IN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: MSIP_Label_f2ed062d-8486-4f50-a4f1-3cce0dd00d64_Enabled=true; MSIP_Label_f2ed062d-8486-4f50-a4f1-3cce0dd00d64_SetDate=2020-03-05T10:22:11Z; MSIP_Label_f2ed062d-8486-4f50-a4f1-3cce0dd00d64_Method=Privileged; MSIP_Label_f2ed062d-8486-4f50-a4f1-3cce0dd00d64_Name=Non-Business; MSIP_Label_f2ed062d-8486-4f50-a4f1-3cce0dd00d64_SiteId=3dd8961f-e488-4e60-8e11-a82d994e183d; MSIP_Label_f2ed062d-8486-4f50-a4f1-3cce0dd00d64_ActionId=7608da7a-4f93-4061-90b3-0000dd8bd7ba; MSIP_Label_f2ed062d-8486-4f50-a4f1-3cce0dd00d64_ContentBits=0 msip_label_f2ed062d-8486-4f50-a4f1-3cce0dd00d64_enabled: true msip_label_f2ed062d-8486-4f50-a4f1-3cce0dd00d64_setdate: 2020-03-05T10:22:24Z msip_label_f2ed062d-8486-4f50-a4f1-3cce0dd00d64_method: Privileged msip_label_f2ed062d-8486-4f50-a4f1-3cce0dd00d64_name: Non-Business msip_label_f2ed062d-8486-4f50-a4f1-3cce0dd00d64_siteid: 3dd8961f-e488-4e60-8e11-a82d994e183d msip_label_f2ed062d-8486-4f50-a4f1-3cce0dd00d64_actionid: 04d89b8f-b61a-45a8-a683-000003c45838 msip_label_f2ed062d-8486-4f50-a4f1-3cce0dd00d64_contentbits: 0 authentication-results: spf=none (sender IP is ) smtp.mailfrom=Ravi1.Kumar@amd.com; x-originating-ip: [165.204.159.242] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: d158a28c-e2b1-4765-b868-08d7c0eed5ad x-ms-traffictypediagnostic: MW2PR12MB2460:|MW2PR12MB2460: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:45; x-forefront-prvs: 03333C607F x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(4636009)(366004)(376002)(39860400002)(346002)(396003)(136003)(199004)(189003)(52536014)(2906002)(6506007)(26005)(5660300002)(478600001)(186003)(71200400001)(81166006)(86362001)(55016002)(7696005)(8676002)(8936002)(66556008)(66446008)(66946007)(66476007)(33656002)(76116006)(64756008)(316002)(9686003)(81156014)(110136005)(83323001); DIR:OUT; SFP:1101; SCL:1; SRVR:MW2PR12MB2460; H:MW2PR12MB2570.namprd12.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: amd.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: WU0OslTSIXUApskKefSMBbD1c9Jg8Xv2R7bScyeNvY2d08BXuO7AA2i/j7a9zzhGagRCJm5CDHjLOSUsoZ6yRcgNQe2Z/gB/j94Svnmt50apz9edjQvsXVU1kXu7W2l17FT5oAAtF0LXju+A4e4GtjQFDKDSzj+Az/qHggYGZalWnSoiaYgEn6afSAxFZ1lqtgttUz+WSPFhpEJxpucIfqbqGy/MkrMX9PbqCiWIzHgaU+SeXRllagw8zCnvODGj3FH8Bsc4cUvqPTZQMLVHQ/uQmr8/KA4tPudfGOpyyWnBeJDVm5L5mP5unxyA+73i2MM8DoUZzJi1PySYmykJBMqnDpcWxlkb+sgjfP19vToSl+Y2PNPWiI/JICT8AqHuNYS94QGHpQh4mwXud13VL9879hUqc625u1l1nBAQt62Mk2Yf9khKrffe2IAkb8GCrMXNrETm8HsTxJSQuMfxDsb5Tc4AkAzRR0B0pgAhZNkrW49woiK95367nwv0MaDn x-ms-exchange-antispam-messagedata: p5xmlxnRIeYtvmPfVpf7pV7ETSsqwpldRsMqK4sOoxoKeg3ZHdauBacGn3Tm3N5Gl8SK1uef7FA2oKPxGKDkfflsICZfSFUIzNzkExPUBcRFC2JFg/0wESFvGSaLSfvxLTXt9KubDVgGOoFAa3mn/A== Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: d158a28c-e2b1-4765-b868-08d7c0eed5ad X-MS-Exchange-CrossTenant-originalarrivaltime: 05 Mar 2020 10:20:31.4546 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: TQNRl1pSvTTw3+FncshdvXykGV6RHNZWDsjp+bMmLpIIVRbdiDjDj5ybyVraz929aSfxMWrzvj/jmqDrcM1HAg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW2PR12MB2460 Subject: Re: [dpdk-dev] [PATCH v1] net/axgbe: add support for Scattered Rx X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Acked-by: Ravi Kumar >From: Selwin Sebastian > >Enable scattered rx support and add jumbo packet receive capability > >Signed-off-by: Selwin Sebastian >--- > doc/guides/nics/features/axgbe.ini | 1 + > drivers/net/axgbe/axgbe_common.h | 2 + > drivers/net/axgbe/axgbe_ethdev.c | 16 +++- > drivers/net/axgbe/axgbe_rxtx.c | 145 +++++++++++++++++++++++++++++ > drivers/net/axgbe/axgbe_rxtx.h | 2 + > 5 files changed, 165 insertions(+), 1 deletion(-) > >diff --git a/doc/guides/nics/features/axgbe.ini b/doc/guides/nics/features= /axgbe.ini >index ab4da559f..0becaa097 100644 >--- a/doc/guides/nics/features/axgbe.ini >+++ b/doc/guides/nics/features/axgbe.ini >@@ -7,6 +7,7 @@ > Speed capabilities =3D Y > Link status =3D Y > Jumbo frame =3D Y >+Scattered Rx =3D Y > Promiscuous mode =3D Y > Allmulticast mode =3D Y > RSS hash =3D Y >diff --git a/drivers/net/axgbe/axgbe_common.h b/drivers/net/axgbe/axgbe_co= mmon.h >index fdb037dd5..fbd46150c 100644 >--- a/drivers/net/axgbe/axgbe_common.h >+++ b/drivers/net/axgbe/axgbe_common.h >@@ -1135,6 +1135,8 @@ > #define RX_NORMAL_DESC3_PL_WIDTH 14 > #define RX_NORMAL_DESC3_RSV_INDEX 26 > #define RX_NORMAL_DESC3_RSV_WIDTH 1 >+#define RX_NORMAL_DESC3_LD_INDEX 28 >+#define RX_NORMAL_DESC3_LD_WIDTH 1 >=20 > #define RX_DESC3_L34T_IPV4_TCP 1 > #define RX_DESC3_L34T_IPV4_UDP 2 >diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_et= hdev.c >index d0b6f091f..013c6330d 100644 >--- a/drivers/net/axgbe/axgbe_ethdev.c >+++ b/drivers/net/axgbe/axgbe_ethdev.c >@@ -249,6 +249,8 @@ axgbe_dev_start(struct rte_eth_dev *dev) { > struct axgbe_port *pdata =3D dev->data->dev_private; > int ret; >+ struct rte_eth_dev_data *dev_data =3D dev->data; >+ uint16_t max_pkt_len =3D dev_data->dev_conf.rxmode.max_rx_pkt_len; >=20 > PMD_INIT_FUNC_TRACE(); >=20 >@@ -279,6 +281,17 @@ axgbe_dev_start(struct rte_eth_dev *dev) >=20 > axgbe_clear_bit(AXGBE_STOPPED, &pdata->dev_state); > axgbe_clear_bit(AXGBE_DOWN, &pdata->dev_state); >+ >+ if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) || >+ max_pkt_len > pdata->rx_buf_size) >+ dev_data->scattered_rx =3D 1; >+ >+ /* Scatter Rx handling */ >+ if (dev_data->scattered_rx) >+ dev->rx_pkt_burst =3D ð_axgbe_recv_scattered_pkts; >+ else >+ dev->rx_pkt_burst =3D &axgbe_recv_pkts; >+ > return 0; > } >=20 >@@ -789,6 +802,8 @@ axgbe_dev_info_get(struct rte_eth_dev *dev, struct rte= _eth_dev_info *dev_info) > DEV_RX_OFFLOAD_IPV4_CKSUM | > DEV_RX_OFFLOAD_UDP_CKSUM | > DEV_RX_OFFLOAD_TCP_CKSUM | >+ DEV_RX_OFFLOAD_JUMBO_FRAME | >+ DEV_RX_OFFLOAD_SCATTER | > DEV_RX_OFFLOAD_KEEP_CRC; >=20 > dev_info->tx_offload_capa =3D >@@ -1020,7 +1035,6 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev) > int ret; >=20 > eth_dev->dev_ops =3D &axgbe_eth_dev_ops; >- eth_dev->rx_pkt_burst =3D &axgbe_recv_pkts; >=20 > /* > * For secondary processes, we don't initialise any further as primary d= iff --git a/drivers/net/axgbe/axgbe_rxtx.c b/drivers/net/axgbe/axgbe_rxtx.c= index 96055c25b..8f818eb89 100644 >--- a/drivers/net/axgbe/axgbe_rxtx.c >+++ b/drivers/net/axgbe/axgbe_rxtx.c >@@ -307,6 +307,151 @@ axgbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx= _pkts, > return nb_rx; > } >=20 >+uint16_t eth_axgbe_recv_scattered_pkts(void *rx_queue, >+ struct rte_mbuf **rx_pkts, uint16_t nb_pkts) { >+ PMD_INIT_FUNC_TRACE(); >+ uint16_t nb_rx =3D 0; >+ struct axgbe_rx_queue *rxq =3D rx_queue; >+ volatile union axgbe_rx_desc *desc; >+ >+ uint64_t old_dirty =3D rxq->dirty; >+ struct rte_mbuf *first_seg =3D NULL; >+ struct rte_mbuf *mbuf, *tmbuf; >+ unsigned int err; >+ uint32_t error_status; >+ uint16_t idx, pidx, data_len =3D 0, pkt_len =3D 0; >+ >+ idx =3D AXGBE_GET_DESC_IDX(rxq, rxq->cur); >+ while (nb_rx < nb_pkts) { >+ bool eop =3D 0; >+next_desc: >+ if (unlikely(idx =3D=3D rxq->nb_desc)) >+ idx =3D 0; >+ >+ desc =3D &rxq->desc[idx]; >+ >+ if (AXGMAC_GET_BITS_LE(desc->write.desc3, RX_NORMAL_DESC3, OWN)) >+ break; >+ >+ tmbuf =3D rte_mbuf_raw_alloc(rxq->mb_pool); >+ if (unlikely(!tmbuf)) { >+ PMD_DRV_LOG(ERR, "RX mbuf alloc failed port_id =3D %u" >+ " queue_id =3D %u\n", >+ (unsigned int)rxq->port_id, >+ (unsigned int)rxq->queue_id); >+ rte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed++; >+ break; >+ } >+ >+ pidx =3D idx + 1; >+ if (unlikely(pidx =3D=3D rxq->nb_desc)) >+ pidx =3D 0; >+ >+ rte_prefetch0(rxq->sw_ring[pidx]); >+ if ((pidx & 0x3) =3D=3D 0) { >+ rte_prefetch0(&rxq->desc[pidx]); >+ rte_prefetch0(&rxq->sw_ring[pidx]); >+ } >+ >+ mbuf =3D rxq->sw_ring[idx]; >+ /* Check for any errors and free mbuf*/ >+ err =3D AXGMAC_GET_BITS_LE(desc->write.desc3, >+ RX_NORMAL_DESC3, ES); >+ error_status =3D 0; >+ if (unlikely(err)) { >+ error_status =3D desc->write.desc3 & AXGBE_ERR_STATUS; >+ if ((error_status !=3D AXGBE_L3_CSUM_ERR) >+ && (error_status !=3D AXGBE_L4_CSUM_ERR)) { >+ rxq->errors++; >+ rte_pktmbuf_free(mbuf); >+ goto err_set; >+ } >+ } >+ rte_prefetch1(rte_pktmbuf_mtod(mbuf, void *)); >+ >+ if (!AXGMAC_GET_BITS_LE(desc->write.desc3, >+ RX_NORMAL_DESC3, LD)) { >+ eop =3D 0; >+ pkt_len =3D rxq->buf_size; >+ data_len =3D pkt_len; >+ } else { >+ eop =3D 1; >+ pkt_len =3D AXGMAC_GET_BITS_LE(desc->write.desc3, >+ RX_NORMAL_DESC3, PL); >+ data_len =3D pkt_len - rxq->crc_len; >+ } >+ >+ if (first_seg !=3D NULL) { >+ if (rte_pktmbuf_chain(first_seg, mbuf) !=3D 0) >+ rte_mempool_put(rxq->mb_pool, >+ first_seg); >+ } else { >+ first_seg =3D mbuf; >+ } >+ >+ /* Get the RSS hash */ >+ if (AXGMAC_GET_BITS_LE(desc->write.desc3, RX_NORMAL_DESC3, RSV)) >+ mbuf->hash.rss =3D rte_le_to_cpu_32(desc->write.desc1); >+ >+ /* Mbuf populate */ >+ mbuf->data_off =3D RTE_PKTMBUF_HEADROOM; >+ mbuf->data_len =3D data_len; >+ >+err_set: >+ rxq->cur++; >+ rxq->sw_ring[idx++] =3D tmbuf; >+ desc->read.baddr =3D >+ rte_cpu_to_le_64(rte_mbuf_data_iova_default(tmbuf)); >+ memset((void *)(&desc->read.desc2), 0, 8); >+ AXGMAC_SET_BITS_LE(desc->read.desc3, RX_NORMAL_DESC3, OWN, 1); >+ rxq->dirty++; >+ >+ if (!eop) { >+ rte_pktmbuf_free(mbuf); >+ goto next_desc; >+ } >+ >+ first_seg->pkt_len =3D pkt_len; >+ rxq->bytes +=3D pkt_len; >+ mbuf->next =3D NULL; >+ >+ first_seg->port =3D rxq->port_id; >+ if (rxq->pdata->rx_csum_enable) { >+ mbuf->ol_flags =3D 0; >+ mbuf->ol_flags |=3D PKT_RX_IP_CKSUM_GOOD; >+ mbuf->ol_flags |=3D PKT_RX_L4_CKSUM_GOOD; >+ if (unlikely(error_status =3D=3D AXGBE_L3_CSUM_ERR)) { >+ mbuf->ol_flags &=3D ~PKT_RX_IP_CKSUM_GOOD; >+ mbuf->ol_flags |=3D PKT_RX_IP_CKSUM_BAD; >+ mbuf->ol_flags &=3D ~PKT_RX_L4_CKSUM_GOOD; >+ mbuf->ol_flags |=3D PKT_RX_L4_CKSUM_UNKNOWN; >+ } else if (unlikely(error_status >+ =3D=3D AXGBE_L4_CSUM_ERR)) { >+ mbuf->ol_flags &=3D ~PKT_RX_L4_CKSUM_GOOD; >+ mbuf->ol_flags |=3D PKT_RX_L4_CKSUM_BAD; >+ } >+ } >+ >+ rx_pkts[nb_rx++] =3D first_seg; >+ >+ /* Setup receipt context for a new packet.*/ >+ first_seg =3D NULL; >+ } >+ >+ /* Save receive context.*/ >+ rxq->pkts +=3D nb_rx; >+ >+ if (rxq->dirty !=3D old_dirty) { >+ rte_wmb(); >+ idx =3D AXGBE_GET_DESC_IDX(rxq, rxq->dirty - 1); >+ AXGMAC_DMA_IOWRITE(rxq, DMA_CH_RDTR_LO, >+ low32_value(rxq->ring_phys_addr + >+ (idx * sizeof(union axgbe_rx_desc)))); >+ } >+ return nb_rx; >+} >+ > /* Tx Apis */ > static void axgbe_tx_queue_release(struct axgbe_tx_queue *tx_queue) { di= ff --git a/drivers/net/axgbe/axgbe_rxtx.h b/drivers/net/axgbe/axgbe_rxtx.h = index a21537df9..f6796b09b 100644 >--- a/drivers/net/axgbe/axgbe_rxtx.h >+++ b/drivers/net/axgbe/axgbe_rxtx.h >@@ -179,6 +179,8 @@ int axgbe_dev_rx_queue_start(struct rte_eth_dev *dev, = uint16_t rx_queue_id); int axgbe_dev_rx_queue_stop(struct rte_eth_dev *dev= , uint16_t rx_queue_id); uint16_t axgbe_recv_pkts(void *rx_queue, struct r= te_mbuf **rx_pkts, > uint16_t nb_pkts); >+uint16_t eth_axgbe_recv_scattered_pkts(void *rx_queue, >+ struct rte_mbuf **rx_pkts, uint16_t nb_pkts); > uint16_t axgbe_recv_pkts_threshold_refresh(void *rx_queue, > struct rte_mbuf **rx_pkts, > uint16_t nb_pkts); >-- >2.17.1 >