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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3f539f96-d5e3-4aa6-a240-08d7ba7f568c X-MS-Exchange-CrossTenant-originalarrivaltime: 26 Feb 2020 05:47:17.0395 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: zK1sac2DzbEnXvEr8f2Bsil/phUtUxtsU9nLnSuXhf8or1qk/Cf0Y50MOVxiUztipKqziOCTjTGnrrB8FjgGdw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW2PR12MB2459 Subject: Re: [dpdk-dev] [PATCH v1] net/axgbe: add support for Scattered Rx X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" [AMD Official Use Only - Internal Distribution Only] Acked-by: Ravi Kumar > > >-----Original Message----- >From: Sebastian, Selwin =20 >Sent: Tuesday, February 25, 2020 6:10 PM >To: dev@dpdk.org >Cc: Kumar, Ravi1 >Subject: [PATCH v1] net/axgbe: add support for Scattered Rx > >From: Selwin Sebastian > >Enable scattered rx support and add jumbo packet transmit capability > >Signed-off-by: Selwin Sebastian >--- > doc/guides/nics/features/axgbe.ini | 1 + > drivers/net/axgbe/axgbe_common.h | 2 + > drivers/net/axgbe/axgbe_ethdev.c | 18 +++- > drivers/net/axgbe/axgbe_rxtx.c | 146 +++++++++++++++++++++++++++++ > drivers/net/axgbe/axgbe_rxtx.h | 2 + > 5 files changed, 168 insertions(+), 1 deletion(-) > >diff --git a/doc/guides/nics/features/axgbe.ini b/doc/guides/nics/features= /axgbe.ini >index ab4da559f..0becaa097 100644 >--- a/doc/guides/nics/features/axgbe.ini >+++ b/doc/guides/nics/features/axgbe.ini >@@ -7,6 +7,7 @@ > Speed capabilities =3D Y > Link status =3D Y > Jumbo frame =3D Y >+Scattered Rx =3D Y > Promiscuous mode =3D Y > Allmulticast mode =3D Y > RSS hash =3D Y >diff --git a/drivers/net/axgbe/axgbe_common.h b/drivers/net/axgbe/axgbe_co= mmon.h >index fdb037dd5..fbd46150c 100644 >--- a/drivers/net/axgbe/axgbe_common.h >+++ b/drivers/net/axgbe/axgbe_common.h >@@ -1135,6 +1135,8 @@ > #define RX_NORMAL_DESC3_PL_WIDTH 14 > #define RX_NORMAL_DESC3_RSV_INDEX 26 > #define RX_NORMAL_DESC3_RSV_WIDTH 1 >+#define RX_NORMAL_DESC3_LD_INDEX 28 >+#define RX_NORMAL_DESC3_LD_WIDTH 1 >=20 > #define RX_DESC3_L34T_IPV4_TCP 1 > #define RX_DESC3_L34T_IPV4_UDP 2 >diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_et= hdev.c >index d0b6f091f..eb2f51f89 100644 >--- a/drivers/net/axgbe/axgbe_ethdev.c >+++ b/drivers/net/axgbe/axgbe_ethdev.c >@@ -789,11 +789,17 @@ axgbe_dev_info_get(struct rte_eth_dev *dev, struct r= te_eth_dev_info *dev_info) > DEV_RX_OFFLOAD_IPV4_CKSUM | > DEV_RX_OFFLOAD_UDP_CKSUM | > DEV_RX_OFFLOAD_TCP_CKSUM | >+ DEV_RX_OFFLOAD_JUMBO_FRAME | >+ DEV_RX_OFFLOAD_SCATTER | > DEV_RX_OFFLOAD_KEEP_CRC; >=20 > dev_info->tx_offload_capa =3D > DEV_TX_OFFLOAD_IPV4_CKSUM | > DEV_TX_OFFLOAD_UDP_CKSUM | >+ DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | >+ DEV_TX_OFFLOAD_UDP_TSO | >+ DEV_TX_OFFLOAD_SCTP_CKSUM | >+ DEV_TX_OFFLOAD_MULTI_SEGS | > DEV_TX_OFFLOAD_TCP_CKSUM; >=20 > if (pdata->hw_feat.rss) { >@@ -1018,9 +1024,19 @@ eth_axgbe_dev_init(struct rte_eth_dev *eth_dev) > struct rte_pci_device *pci_dev; > uint32_t reg, mac_lo, mac_hi; > int ret; >+ struct rte_eth_dev_info dev_info =3D { 0 }; >=20 > eth_dev->dev_ops =3D &axgbe_eth_dev_ops; >- eth_dev->rx_pkt_burst =3D &axgbe_recv_pkts; >+ eth_dev->dev_ops->dev_infos_get(eth_dev, &dev_info); >+ >+ if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_SCATTER) >+ eth_dev->data->scattered_rx =3D 1; >+ >+ /* Scatter Rx handling */ >+ if (eth_dev->data->scattered_rx) >+ eth_dev->rx_pkt_burst =3D ð_axgbe_recv_scattered_pkts; >+ else >+ eth_dev->rx_pkt_burst =3D &axgbe_recv_pkts; >=20 > /* > * For secondary processes, we don't initialise any further as primary d= iff --git a/drivers/net/axgbe/axgbe_rxtx.c b/drivers/net/axgbe/axgbe_rxtx.c= index 96055c25b..57e2bbb34 100644 >--- a/drivers/net/axgbe/axgbe_rxtx.c >+++ b/drivers/net/axgbe/axgbe_rxtx.c >@@ -307,6 +307,152 @@ axgbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx= _pkts, > return nb_rx; > } >=20 >+ >+uint16_t eth_axgbe_recv_scattered_pkts(void *rx_queue, >+ struct rte_mbuf **rx_pkts, uint16_t nb_pkts) { >+ PMD_INIT_FUNC_TRACE(); >+ uint16_t nb_rx =3D 0; >+ struct axgbe_rx_queue *rxq =3D rx_queue; >+ volatile union axgbe_rx_desc *desc; >+ >+ uint64_t old_dirty =3D rxq->dirty; >+ struct rte_mbuf *first_seg =3D NULL; >+ struct rte_mbuf *mbuf, *tmbuf; >+ unsigned int err; >+ uint32_t error_status; >+ uint16_t idx, pidx, data_len =3D 0, pkt_len =3D 0; >+ >+ idx =3D AXGBE_GET_DESC_IDX(rxq, rxq->cur); >+ while (nb_rx < nb_pkts) { >+ bool eop =3D 0; >+next_desc: >+ if (unlikely(idx =3D=3D rxq->nb_desc)) >+ idx =3D 0; >+ >+ desc =3D &rxq->desc[idx]; >+ >+ if (AXGMAC_GET_BITS_LE(desc->write.desc3, RX_NORMAL_DESC3, OWN)) >+ break; >+ >+ tmbuf =3D rte_mbuf_raw_alloc(rxq->mb_pool); >+ if (unlikely(!tmbuf)) { >+ PMD_DRV_LOG(ERR, "RX mbuf alloc failed port_id =3D %u" >+ " queue_id =3D %u\n", >+ (unsigned int)rxq->port_id, >+ (unsigned int)rxq->queue_id); >+ rte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed++; >+ break; >+ } >+ >+ pidx =3D idx + 1; >+ if (unlikely(pidx =3D=3D rxq->nb_desc)) >+ pidx =3D 0; >+ >+ rte_prefetch0(rxq->sw_ring[pidx]); >+ if ((pidx & 0x3) =3D=3D 0) { >+ rte_prefetch0(&rxq->desc[pidx]); >+ rte_prefetch0(&rxq->sw_ring[pidx]); >+ } >+ >+ mbuf =3D rxq->sw_ring[idx]; >+ /* Check for any errors and free mbuf*/ >+ err =3D AXGMAC_GET_BITS_LE(desc->write.desc3, >+ RX_NORMAL_DESC3, ES); >+ error_status =3D 0; >+ if (unlikely(err)) { >+ error_status =3D desc->write.desc3 & AXGBE_ERR_STATUS; >+ if ((error_status !=3D AXGBE_L3_CSUM_ERR) >+ && (error_status !=3D AXGBE_L4_CSUM_ERR)) { >+ rxq->errors++; >+ rte_pktmbuf_free(mbuf); >+ goto err_set; >+ } >+ } >+ rte_prefetch1(rte_pktmbuf_mtod(mbuf, void *)); >+ >+ if (!AXGMAC_GET_BITS_LE(desc->write.desc3, >+ RX_NORMAL_DESC3, LD)) { >+ eop =3D 0; >+ pkt_len =3D rxq->buf_size; >+ data_len =3D pkt_len; >+ } else { >+ eop =3D 1; >+ pkt_len =3D AXGMAC_GET_BITS_LE(desc->write.desc3, >+ RX_NORMAL_DESC3, PL); >+ data_len =3D pkt_len - rxq->crc_len; >+ } >+ >+ if (first_seg !=3D NULL) { >+ if (rte_pktmbuf_chain(first_seg, mbuf) !=3D 0) >+ rte_mempool_put(rxq->mb_pool, >+ first_seg); >+ } else { >+ first_seg =3D mbuf; >+ } >+ >+ /* Get the RSS hash */ >+ if (AXGMAC_GET_BITS_LE(desc->write.desc3, RX_NORMAL_DESC3, RSV)) >+ mbuf->hash.rss =3D rte_le_to_cpu_32(desc->write.desc1); >+ >+ /* Mbuf populate */ >+ mbuf->data_off =3D RTE_PKTMBUF_HEADROOM; >+ mbuf->data_len =3D data_len; >+ >+err_set: >+ rxq->cur++; >+ rxq->sw_ring[idx++] =3D tmbuf; >+ desc->read.baddr =3D >+ rte_cpu_to_le_64(rte_mbuf_data_iova_default(tmbuf)); >+ memset((void *)(&desc->read.desc2), 0, 8); >+ AXGMAC_SET_BITS_LE(desc->read.desc3, RX_NORMAL_DESC3, OWN, 1); >+ rxq->dirty++; >+ >+ if (!eop) { >+ rte_pktmbuf_free(mbuf); >+ goto next_desc; >+ } >+ >+ first_seg->pkt_len =3D pkt_len; >+ rxq->bytes +=3D pkt_len; >+ mbuf->next =3D NULL; >+ >+ first_seg->port =3D rxq->port_id; >+ if (rxq->pdata->rx_csum_enable) { >+ mbuf->ol_flags =3D 0; >+ mbuf->ol_flags |=3D PKT_RX_IP_CKSUM_GOOD; >+ mbuf->ol_flags |=3D PKT_RX_L4_CKSUM_GOOD; >+ if (unlikely(error_status =3D=3D AXGBE_L3_CSUM_ERR)) { >+ mbuf->ol_flags &=3D ~PKT_RX_IP_CKSUM_GOOD; >+ mbuf->ol_flags |=3D PKT_RX_IP_CKSUM_BAD; >+ mbuf->ol_flags &=3D ~PKT_RX_L4_CKSUM_GOOD; >+ mbuf->ol_flags |=3D PKT_RX_L4_CKSUM_UNKNOWN; >+ } else if (unlikely(error_status >+ =3D=3D AXGBE_L4_CSUM_ERR)) { >+ mbuf->ol_flags &=3D ~PKT_RX_L4_CKSUM_GOOD; >+ mbuf->ol_flags |=3D PKT_RX_L4_CKSUM_BAD; >+ } >+ } >+ >+ rx_pkts[nb_rx++] =3D first_seg; >+ >+ /* Setup receipt context for a new packet.*/ >+ first_seg =3D NULL; >+ } >+ >+ /* Save receive context.*/ >+ rxq->pkts +=3D nb_rx; >+ >+ if (rxq->dirty !=3D old_dirty) { >+ rte_wmb(); >+ idx =3D AXGBE_GET_DESC_IDX(rxq, rxq->dirty - 1); >+ AXGMAC_DMA_IOWRITE(rxq, DMA_CH_RDTR_LO, >+ low32_value(rxq->ring_phys_addr + >+ (idx * sizeof(union axgbe_rx_desc)))); >+ } >+ return nb_rx; >+} >+ > /* Tx Apis */ > static void axgbe_tx_queue_release(struct axgbe_tx_queue *tx_queue) { di= ff --git a/drivers/net/axgbe/axgbe_rxtx.h b/drivers/net/axgbe/axgbe_rxtx.h = index a21537df9..f6796b09b 100644 >--- a/drivers/net/axgbe/axgbe_rxtx.h >+++ b/drivers/net/axgbe/axgbe_rxtx.h >@@ -179,6 +179,8 @@ int axgbe_dev_rx_queue_start(struct rte_eth_dev *dev, = uint16_t rx_queue_id); int axgbe_dev_rx_queue_stop(struct rte_eth_dev *dev= , uint16_t rx_queue_id); uint16_t axgbe_recv_pkts(void *rx_queue, struct r= te_mbuf **rx_pkts, > uint16_t nb_pkts); >+uint16_t eth_axgbe_recv_scattered_pkts(void *rx_queue, >+ struct rte_mbuf **rx_pkts, uint16_t nb_pkts); > uint16_t axgbe_recv_pkts_threshold_refresh(void *rx_queue, > struct rte_mbuf **rx_pkts, > uint16_t nb_pkts); >-- >2.17.1 >