Re: [dpdk-dev] [PATCH] net/i40e: enable port filter by switch filter

["Zhao1, Wei" <wei.zhao1@intel.com>]

Hi, Guinan

> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Guinan Sun
> Sent: Thursday, June 11, 2020 1:24 PM
> To: dev@dpdk.org
> Cc: Xing, Beilei <beilei.xing@intel.com>; Guo, Jia <jia.guo@intel.com>; Sun,
> GuinanX <guinanx.sun@intel.com>
> Subject: [dpdk-dev] [PATCH] net/i40e: enable port filter by switch filter
> 
> This patch enables the filter that supports to create following two rules for the
> same packet type:
> One is to select source port only as input set and the other is for destination
> port only.
> 
> Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
> ---
>  doc/guides/rel_notes/release_20_08.rst |   7 +
>  drivers/net/i40e/i40e_ethdev.c         | 195 ++++++++++++++++++++-
>  drivers/net/i40e/i40e_ethdev.h         |  17 ++
>  drivers/net/i40e/i40e_flow.c           | 223
> +++++++++++++++++++++++++
>  4 files changed, 441 insertions(+), 1 deletion(-)
> 
> diff --git a/doc/guides/rel_notes/release_20_08.rst
> b/doc/guides/rel_notes/release_20_08.rst
> index 7a67c960c..16870100d 100644
> --- a/doc/guides/rel_notes/release_20_08.rst
> +++ b/doc/guides/rel_notes/release_20_08.rst
> @@ -68,6 +68,13 @@ New Features
> 
>    * Added new PMD devarg ``reclaim_mem_mode``.
> 
> +* **Updated Intel i40e driver.**
> +
> +  Updated i40e PMD with new features and improvements, including:
> +
> +  * Added a new type of cloud filter to support the coexistence of the
> +    following two rules. One selects L4 destination as input set and
> +    the other one selects L4 source port.
> 
>  Removed Items
>  -------------
> diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
> index 970a31cb2..97e6e948a 100644
> --- a/drivers/net/i40e/i40e_ethdev.c
> +++ b/drivers/net/i40e/i40e_ethdev.c
> @@ -7956,6 +7956,13 @@ i40e_dev_tunnel_filter_set(struct i40e_pf *pf,
>  #define I40E_TR_GRE_KEY_MASK			0x400
>  #define I40E_TR_GRE_KEY_WITH_XSUM_MASK		0x800
>  #define I40E_TR_GRE_NO_KEY_MASK			0x8000

> +#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_PORT_TR_WORD0 0x49

A confused question, this 0x49 seems to be a field vector index? Filed vector table is 128 byte long, why does this can large than 64?


> #define
> +I40E_AQC_REPLACE_CLOUD_CMD_INPUT_DIRECTION_WORD0 0x41 #define
> +I40E_AQC_REPLACE_CLOUD_CMD_INPUT_INGRESS_WORD0 0x80
> +#define I40E_DIRECTION_INGRESS_KEY		0x8000
> +#define I40E_TR_L4_TYPE_TCP			0x2
> +#define I40E_TR_L4_TYPE_UDP			0x4
> +#define I40E_TR_L4_TYPE_SCTP			0x8
> 
>  static enum
>  i40e_status_code i40e_replace_mpls_l1_filter(struct i40e_pf *pf) @@
> -8254,6 +8261,131 @@ i40e_status_code
> i40e_replace_gtp_cloud_filter(struct i40e_pf *pf)
>  	return status;