From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id CBC4AA034C; Thu, 28 Apr 2022 17:14:54 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id BBFE242820; Thu, 28 Apr 2022 17:14:54 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mails.dpdk.org (Postfix) with ESMTP id 75EC642819 for ; Thu, 28 Apr 2022 17:14:52 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651158892; x=1682694892; h=from:to:cc:subject:date:message-id:references: in-reply-to:content-transfer-encoding:mime-version; bh=E6cyGpK7g9t2rdyqXOVU++plwpiLC5/z5vYp8DDY/64=; b=kSbUBrDLiwH3c0Fazr415r0IfLBJTW65d4rlnaqblGxJYV7t/w584g7b TZCaYOoztU4mAt1+YIhH+Sm0upW0JZ2MqOGwEwjxUr02cQgelX4EQJMNS Oq9mh2WXFEjdztgSNjdPvAsIWTBwIhgqyHUKqC/y0FG0Pr2buQojDxC4w 3cxscVfifEhnvPX/iSpZssK6Kk2m32d9/iP/Ax8qh9Y/I4ZTQz1Xqiwjh UcLN4vvnAY+DS2/2v+rKCjeGvZw2bt3vO3jjkn4WlUi0aKlQhaPfAw5Ka RnPrhloSAik9TUFSbc+M2zLZEDGEomcKMqmNGtR/3LRZjztpkqQhywwdY w==; X-IronPort-AV: E=McAfee;i="6400,9594,10330"; a="265168920" X-IronPort-AV: E=Sophos;i="5.91,295,1647327600"; d="scan'208";a="265168920" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Apr 2022 08:14:51 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,295,1647327600"; d="scan'208";a="878875943" Received: from fmsmsx606.amr.corp.intel.com ([10.18.126.86]) by fmsmga005.fm.intel.com with ESMTP; 28 Apr 2022 08:14:51 -0700 Received: from fmsmsx612.amr.corp.intel.com (10.18.126.92) by fmsmsx606.amr.corp.intel.com (10.18.126.86) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.27; Thu, 28 Apr 2022 08:14:51 -0700 Received: from fmsmsx608.amr.corp.intel.com (10.18.126.88) by fmsmsx612.amr.corp.intel.com (10.18.126.92) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.27; Thu, 28 Apr 2022 08:14:50 -0700 Received: from fmsedg601.ED.cps.intel.com (10.1.192.135) by fmsmsx608.amr.corp.intel.com (10.18.126.88) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.27 via Frontend Transport; Thu, 28 Apr 2022 08:14:50 -0700 Received: from NAM04-BN8-obe.outbound.protection.outlook.com (104.47.74.40) by edgegateway.intel.com (192.55.55.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2308.27; Thu, 28 Apr 2022 08:14:50 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Rh0ZHGn/fxSoLurgAAeBXwhVvP34Mia0HOwq+uVpuoL2i5psv4FNYFaq1swpHSWzjoTn24CybPOEzfIGBYNXRzAEK9sfGZtaaia+wWajmFbuNGAPFjMV6htkzQQE0t9brTJ5/cKNEGfZihBzRZEUm8QmJXNJYu6NAtt6eMjrbHbPPDItlprw58xQZxyZtHh7ML59BaOsue4T8ZIg2mlj9mv9LrKNzH5B/dFy10eVj6XbwiXfmHofYJQawoGUz8kdYUY5egc+bLQqbHoP6e5pG9rKIlwH0oKlSgGE3lI+lm7p0llYaOLy9mwnf0kuzl89I62aoyGAXRbOZqcAut+Q4g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=3uaSBNPJyxLMVmVYEZQrx/9iUjk+Xx7bEaDMebLIZgI=; b=KA33jagrkTkyl5WD6ds1CupiP+5/9463AjAmZCLiTop1iuTL2eB1HNXZjSIdcD2BX5gIIrFR5xQmdAjztdf31naBfjNJF8xNHYB5cWwHSiEZzUpmhRiuPRobAw2cghNi+4gLKd6EqwPb05j1JBf1JRfEsGE3JF4QIQkesALtwUzAS4W4/1nx/4YyHtW+EEOa3QWEovmnv7YA4C4D7bnBLH3KpF0OVBqtXF3OtlN5EXJxj/hgLmMBGFSyZi6m57p0LjQmsjh+ixYEYeK8EO1wO1QEFbwY+5G7KbuAKy+pzmEh1btKSYbqrpi3s8hB5u5hoaAqvQz+GpIpj99lFtSObQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Received: from PH0PR11MB5832.namprd11.prod.outlook.com (2603:10b6:510:141::7) by BYAPR11MB3414.namprd11.prod.outlook.com (2603:10b6:a03:85::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5186.15; Thu, 28 Apr 2022 15:14:47 +0000 Received: from PH0PR11MB5832.namprd11.prod.outlook.com ([fe80::ad86:86fe:a02b:174f]) by PH0PR11MB5832.namprd11.prod.outlook.com ([fe80::ad86:86fe:a02b:174f%5]) with mapi id 15.20.5186.021; Thu, 28 Apr 2022 15:14:47 +0000 From: "Gujjar, Abhinandan S" To: Akhil Goyal , "dev@dpdk.org" CC: "anoobj@marvell.com" , "jerinj@marvell.com" , "Jayatheerthan, Jay" , "Vangati, Narender" , "vfialko@marvell.com" Subject: RE: [PATCH v3 6/7] test/event: add asymmetric cases for crypto adapter Thread-Topic: [PATCH v3 6/7] test/event: add asymmetric cases for crypto adapter Thread-Index: AQHYVY1oltJA0+sYv0OX/n/zqW+d6a0FeVVg Date: Thu, 28 Apr 2022 15:14:47 +0000 Message-ID: References: <20220418193325.368313-1-gakhil@marvell.com> <20220421143720.1583062-1-gakhil@marvell.com> <20220421143720.1583062-7-gakhil@marvell.com> In-Reply-To: <20220421143720.1583062-7-gakhil@marvell.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-reaction: no-action dlp-version: 11.6.500.15 authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 6e9dc39b-bc50-4fce-c640-08da2929d577 x-ms-traffictypediagnostic: BYAPR11MB3414:EE_ x-microsoft-antispam-prvs: x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: 7cxjGmVcDgvi8+Z6QfZ9FnzHC4XxAJCCiClW6HgvfZquUbhZJIjU0UZSHa6lFZDN8imdxPEF5aILM1+isEeQFCnTKuR1PqAUsjlB5JuViviDZoMhXjR70YsdWbF1rRJUkfNxt9VVmlhRgGwQhRatxfsPZ2ttd0oXqP6ZAHkAoOJquc+9CYX3t7CKlz6L7Y7IzNluhCn2L61slCW+q7xCmwrhuyIOwD0rbRfzNsXT5U+5dWKsu7mdJaZWZfIbMEctW6eS5sB2dcm7nL8E70aK0GB8uwOwBzTejspW4hh+5vTAJk0rw5YsKTyQF1eXFsNJNHyBVWGqeIl6UWNFtDJd6KUFdyg6BhqfvmKyvRPbJd+ukNzakDGa+chKbAdPWS7u+nW1a4pu8TleTEtIq18k6SCc1dKgDXqoVvgHX1sOHE8qlrMtXlkviLe3jDHxifT8ZyEgDYojsaCdsKKbhm1CL9JewJKxPDF4fHx011iEdwK85/OfmnEWmYre+S4uzDff1m90RqBK9n14j4O07RZ8HkhiJ+PVJAY+qpnTk2TNgYSqYbC9DPHY9Fs5ldruUoLev6NavKBGN4mKKrh5Wq9cxE8uzKJr2aaxbWe5KIjy/xCI8oNQz1Kx0YxuNT32b2VK4faB5yKrIoxcjh6e2lxD6y8LAkPhwVwMkgmdykukk8O/75VqQBvdCYhspwWMAAH0kW4KTNJ2GA0iKooRUZXBmw== x-forefront-antispam-report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:PH0PR11MB5832.namprd11.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230001)(366004)(55016003)(110136005)(30864003)(55236004)(53546011)(82960400001)(2906002)(66476007)(66556008)(66946007)(38100700002)(316002)(54906003)(71200400001)(6506007)(7696005)(508600001)(38070700005)(9686003)(122000001)(52536014)(5660300002)(8936002)(83380400001)(8676002)(86362001)(4326008)(76116006)(66446008)(64756008)(26005)(186003)(33656002)(559001)(579004); DIR:OUT; SFP:1102; x-ms-exchange-antispam-messagedata-chunkcount: 1 x-ms-exchange-antispam-messagedata-0: =?us-ascii?Q?gJltVGo9xMjo6BOCG3fEiZ0ebfaJizbUACd2EX3CjjKVrY3GkrKqtFA9zB4h?= =?us-ascii?Q?Db+0N3ANP1qwLuPcQeWsnib/2gi+skCghUFvzoilp8H3Mbw8Yn4WUPQ5M/ir?= =?us-ascii?Q?MWdUPrkpPsjSG/dotNefRIl82NG+6GV+LYvKVL9U9SmTf7AiICpoSPLFJTAd?= =?us-ascii?Q?RDruYd0Fl5sVuRAcUKj7bSq4Kld122MCczHsCsuCiPovO4IHkD1R6fZrmahy?= =?us-ascii?Q?nAmhjXTJJ73IOB/3JgkHJNmEFakCxAFId2ez+CBjtlfUocik+VXEiEpiWeuW?= =?us-ascii?Q?QwOgPuVUwpytE7pZ4Row4DCPpKKkww/nlKxiMO0vJd8paIj24DhSvgaX8nsL?= =?us-ascii?Q?Vq+QB3wJp3jq89qS0oBZdSSxGK9eeX2P3GOgZcefR0syuUnrZgoCj/I6qC8A?= =?us-ascii?Q?0lLuberZlSnqk2rGsHGjZ5YEFEXG5SdTuvQvl43OmoX/y5tohDr5uTqOwZh5?= =?us-ascii?Q?p7efFWXZROHeDWlPMVpJTfdMNmwy4Wij6JcOQWej+bQMNNpy9zTbBvbuAN+i?= =?us-ascii?Q?q7FRjH/eYMCZU0SX1PTM3jHHUmaz4Y6QLQBfRvgMMXLGlOaF8AxXLuvlvoFF?= =?us-ascii?Q?bwAq2k1c31W9jRrYk//tlW1GN6vKwH4FDrwf+MxJSChL+5Q7o8g+qrcyBZ+h?= =?us-ascii?Q?m64pyMu5VbkhcJsWXWkSzNwaM9YJrsvWnPkm9Ld2iLbkgdamOD4kBLV5NSWf?= =?us-ascii?Q?eWz9iI6+0DR/+5ux20omIpntL3hYIo3Mg/BHi/tPk0EBHxeBUyQbR3tLZH/L?= =?us-ascii?Q?P8kSmkPBTpxMNfYGx3iA/wHfUQWYYdN+K4nP45d3zzrhczzAKB7lIX46KOs4?= =?us-ascii?Q?YWvB60jO0qySAj9APj/OJYUnc/0swEJBjLayp+JCcE/JMw1YcJybgBrDplHp?= =?us-ascii?Q?M3SeEjBklveMTEX6qLcKKioxYXv5jOIyXHSDaU1TKc7vnawpvhAwfdgCXB4N?= =?us-ascii?Q?4l4+QehHLlp3SdXISqOxResaoXXrS6unqUCYueaBhT7bSO5rHjXXblh79p64?= =?us-ascii?Q?PjB2O5iVvTq0vH2goC/Vk1yx8iZUV6Es5sQBpk5aRQzIdJOWGY6GreI24Rps?= =?us-ascii?Q?DCFaCydyZLNtWSP9eADJyCYscLEkOeMG7Qt2kutFxjmWHt/4hQicf5ul7l50?= =?us-ascii?Q?huukWYQnuDVWWwdTrkkZPtjiqTLUpi0qPA8OkDKRYS4D/MoJHThKGub/Slam?= =?us-ascii?Q?YLYrG8wxeyxvYOU/sV7U0FqcvQVvSTj1oYleGnO+g2wbKVpfIlHglPzMH0XW?= =?us-ascii?Q?aQ9jtMfl9+UGHF07if6JU7ucu4EWSXgJTpOSTFK1wsCWakJiI4LBZNMtlmr1?= =?us-ascii?Q?fLCrFxAqIY/1KmCTpgR3p0lKQZ8VeTVuxLOfGsHNi1J8B1vpJM9Zl1ZUkpy0?= =?us-ascii?Q?M/vBu/OcH/XDr2fPoHURIPueVVD9/nCz0UOY827rn2GbTrXpFcZCbX1TVz6n?= =?us-ascii?Q?BkBqYj+IYNhLr7EHj/U1VMv6UaQgOx4DyPceU2Gh/Xa6TyzVM9w4a9kwfVuk?= =?us-ascii?Q?HfYApt4ffLhnHHy34ukQ8r8/sDcYen2Ii5V0Dcwa5Ihdk+GsNsCFA72ESEHw?= =?us-ascii?Q?gpAY1w4eEIXhoChIqF30kL9ctaWJzZJWx/DA0mbc1lcz0TnvtdtDLopUIiiA?= =?us-ascii?Q?qj8c3nTr1JLCyR3N94WdwK9owSrjQBbrUQgcFNppA8u0ulCebLxKGrGHu30z?= =?us-ascii?Q?yAquuonJzTRormpBSXWD6HbUJX1ZcjgGCRFT/7NFkQtv3N8ylnLvAbmY+LcH?= =?us-ascii?Q?N3TA50mR/k7mJJWvTPl/yFiJX9HpfBw=3D?= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PH0PR11MB5832.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6e9dc39b-bc50-4fce-c640-08da2929d577 X-MS-Exchange-CrossTenant-originalarrivaltime: 28 Apr 2022 15:14:47.7984 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: VTtg3yX4dpz8NlA/8G4+YILCA0qGPG+ougsP4lCTzpGZxpszVadswVPYzUTrkniCOd74C9mJUADZpSue+Icz2HCg4Kn/0rw3STa1lYIWlmk= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR11MB3414 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This is failing with asym changes. Please look into this. root@xdp-dev:/home/intel/abhi/dpdk-next-eventdev/abhi# ./app/test/dpdk-test EAL: Detected CPU lcores: 96 EAL: Detected NUMA nodes: 2 EAL: Detected static linkage of DPDK EAL: Multi-process socket /var/run/dpdk/rte/mp_socket EAL: Selected IOVA mode 'PA' EAL: VFIO support initialized EAL: Probe PCI driver: net_ice (8086:1593) device: 0000:18:00.0 (socket 0) ice_load_pkg_type(): Active package is: 1.3.26.0, ICE OS Default Package (s= ingle VLAN mode) EAL: Probe PCI driver: net_ice (8086:1593) device: 0000:18:00.1 (socket 0) ice_load_pkg_type(): Active package is: 1.3.26.0, ICE OS Default Package (s= ingle VLAN mode) TELEMETRY: No legacy callbacks, legacy socket not created APP: HPET is not enabled, using TSC as default timer RTE>>event_crypto_adapter_autotest + ------------------------------------------------------- + + Test Suite : Event crypto adapter test suite CRYPTODEV: Creating cryptodev crypto_null CRYPTODEV: Initialisation parameters - name: crypto_null,socket id: 0, max = queue pairs: 8 CRYPTODEV: elt_size 0 is expanded to 208 CRYPTODEV: Could not set max private session size EAL: Test assert configure_cryptodev line 1028 failed: asym session mempool= allocation failed EAL: Test assert testsuite_setup line 1361 failed: cryptodev initialization= failed + ------------------------------------------------------- + + Test Suite Summary : Event crypto adapter test suite + ------------------------------------------------------- + + Tests Total : 11 + Tests Skipped : 0 + Tests Executed : 0 + Tests Unsupported: 0 + Tests Passed : 0 + Tests Failed : 11 + ------------------------------------------------------- + Test Failed > -----Original Message----- > From: Akhil Goyal > Sent: Thursday, April 21, 2022 8:07 PM > To: dev@dpdk.org > Cc: anoobj@marvell.com; jerinj@marvell.com; Gujjar, Abhinandan S > ; Jayatheerthan, Jay > ; Vangati, Narender > ; vfialko@marvell.com; Akhil Goyal > > Subject: [PATCH v3 6/7] test/event: add asymmetric cases for crypto adapt= er >=20 > Test app is updated to add cases for asymmetric crypto sessions for event > crypto adapter. >=20 > Signed-off-by: Akhil Goyal > --- > app/test/test_event_crypto_adapter.c | 491 ++++++++++++++++++++++++++- > 1 file changed, 485 insertions(+), 6 deletions(-) >=20 > diff --git a/app/test/test_event_crypto_adapter.c > b/app/test/test_event_crypto_adapter.c > index 9904206735..eecfc22057 100644 > --- a/app/test/test_event_crypto_adapter.c > +++ b/app/test/test_event_crypto_adapter.c > @@ -6,6 +6,7 @@ > #include "test.h" > #include > #include > +#include > #include > #include > #include > @@ -67,12 +68,97 @@ static const uint8_t text_64B[] =3D { > 0x31, 0xbf, 0xe9, 0xa1, 0x97, 0x5c, 0x2b, 0xd6, > 0x57, 0xa5, 0x9f, 0xab, 0xbd, 0xb0, 0x9b, 0x9c }; > +#define DATA_SIZE 512 > +struct modex_test_data { > + enum rte_crypto_asym_xform_type xform_type; > + struct { > + uint8_t data[DATA_SIZE]; > + uint16_t len; > + } base; > + struct { > + uint8_t data[DATA_SIZE]; > + uint16_t len; > + } exponent; > + struct { > + uint8_t data[DATA_SIZE]; > + uint16_t len; > + } modulus; > + struct { > + uint8_t data[DATA_SIZE]; > + uint16_t len; > + } reminder; > + uint16_t result_len; > +}; > + > +static struct > +modex_test_data modex_test_case =3D { > + .xform_type =3D RTE_CRYPTO_ASYM_XFORM_MODEX, > + .base =3D { > + .data =3D { > + 0xF8, 0xBA, 0x1A, 0x55, 0xD0, 0x2F, 0x85, > + 0xAE, 0x96, 0x7B, 0xB6, 0x2F, 0xB6, 0xCD, > + 0xA8, 0xEB, 0x7E, 0x78, 0xA0, 0x50 > + }, > + .len =3D 20, > + }, > + .exponent =3D { > + .data =3D { > + 0x01, 0x00, 0x01 > + }, > + .len =3D 3, > + }, > + .reminder =3D { > + .data =3D { > + 0x2C, 0x60, 0x75, 0x45, 0x98, 0x9D, 0xE0, 0x72, > + 0xA0, 0x9D, 0x3A, 0x9E, 0x03, 0x38, 0x73, 0x3C, > + 0x31, 0x83, 0x04, 0xFE, 0x75, 0x43, 0xE6, 0x17, > + 0x5C, 0x01, 0x29, 0x51, 0x69, 0x33, 0x62, 0x2D, > + 0x78, 0xBE, 0xAE, 0xC4, 0xBC, 0xDE, 0x7E, 0x2C, > + 0x77, 0x84, 0xF2, 0xC5, 0x14, 0xB5, 0x2F, 0xF7, > + 0xC5, 0x94, 0xEF, 0x86, 0x75, 0x75, 0xB5, 0x11, > + 0xE5, 0x0E, 0x0A, 0x29, 0x76, 0xE2, 0xEA, 0x32, > + 0x0E, 0x43, 0x77, 0x7E, 0x2C, 0x27, 0xAC, 0x3B, > + 0x86, 0xA5, 0xDB, 0xC9, 0x48, 0x40, 0xE8, 0x99, > + 0x9A, 0x0A, 0x3D, 0xD6, 0x74, 0xFA, 0x2E, 0x2E, > + 0x5B, 0xAF, 0x8C, 0x99, 0x44, 0x2A, 0x67, 0x38, > + 0x27, 0x41, 0x59, 0x9D, 0xB8, 0x51, 0xC9, 0xF7, > + 0x43, 0x61, 0x31, 0x6E, 0xF1, 0x25, 0x38, 0x7F, > + 0xAE, 0xC6, 0xD0, 0xBB, 0x29, 0x76, 0x3F, 0x46, > + 0x2E, 0x1B, 0xE4, 0x67, 0x71, 0xE3, 0x87, 0x5A > + }, > + .len =3D 128, > + }, > + .modulus =3D { > + .data =3D { > + 0xb3, 0xa1, 0xaf, 0xb7, 0x13, 0x08, 0x00, 0x0a, > + 0x35, 0xdc, 0x2b, 0x20, 0x8d, 0xa1, 0xb5, 0xce, > + 0x47, 0x8a, 0xc3, 0x80, 0xf4, 0x7d, 0x4a, 0xa2, > + 0x62, 0xfd, 0x61, 0x7f, 0xb5, 0xa8, 0xde, 0x0a, > + 0x17, 0x97, 0xa0, 0xbf, 0xdf, 0x56, 0x5a, 0x3d, > + 0x51, 0x56, 0x4f, 0x70, 0x70, 0x3f, 0x63, 0x6a, > + 0x44, 0x5b, 0xad, 0x84, 0x0d, 0x3f, 0x27, 0x6e, > + 0x3b, 0x34, 0x91, 0x60, 0x14, 0xb9, 0xaa, 0x72, > + 0xfd, 0xa3, 0x64, 0xd2, 0x03, 0xa7, 0x53, 0x87, > + 0x9e, 0x88, 0x0b, 0xc1, 0x14, 0x93, 0x1a, 0x62, > + 0xff, 0xb1, 0x5d, 0x74, 0xcd, 0x59, 0x63, 0x18, > + 0x11, 0x3d, 0x4f, 0xba, 0x75, 0xd4, 0x33, 0x4e, > + 0x23, 0x6b, 0x7b, 0x57, 0x44, 0xe1, 0xd3, 0x03, > + 0x13, 0xa6, 0xf0, 0x8b, 0x60, 0xb0, 0x9e, 0xee, > + 0x75, 0x08, 0x9d, 0x71, 0x63, 0x13, 0xcb, 0xa6, > + 0x81, 0x92, 0x14, 0x03, 0x22, 0x2d, 0xde, 0x55 > + }, > + .len =3D 128, > + }, > + .result_len =3D 128, > +}; >=20 > struct event_crypto_adapter_test_params { > struct rte_mempool *mbuf_pool; > struct rte_mempool *op_mpool; > + struct rte_mempool *asym_op_mpool; > struct rte_mempool *session_mpool; > struct rte_mempool *session_priv_mpool; > + struct rte_mempool *asym_sess_mpool; > struct rte_cryptodev_config *config; > uint8_t crypto_event_port_id; > uint8_t internal_port_op_fwd; > @@ -134,11 +220,24 @@ send_recv_ev(struct rte_event *ev) > rte_pause(); >=20 > op =3D recv_ev.event_ptr; > + if (op->type =3D=3D RTE_CRYPTO_OP_TYPE_SYMMETRIC) { > #if PKT_TRACE > - struct rte_mbuf *m =3D op->sym->m_src; > - rte_pktmbuf_dump(stdout, m, rte_pktmbuf_pkt_len(m)); > + struct rte_mbuf *m =3D op->sym->m_src; > + rte_pktmbuf_dump(stdout, m, rte_pktmbuf_pkt_len(m)); > #endif > - rte_pktmbuf_free(op->sym->m_src); > + rte_pktmbuf_free(op->sym->m_src); > + } else { > + uint8_t *data_expected =3D NULL, *data_received =3D NULL; > + uint32_t data_size; > + > + data_expected =3D modex_test_case.reminder.data; > + data_received =3D op->asym->modex.result.data; > + data_size =3D op->asym->modex.result.length; > + ret =3D memcmp(data_expected, data_received, data_size); > + TEST_ASSERT_EQUAL(ret, 0, > + "Data mismatch for asym crypto adapter\n"); > + rte_free(op->asym->modex.result.data); > + } > rte_crypto_op_free(op); >=20 > return TEST_SUCCESS; > @@ -348,6 +447,170 @@ test_session_with_op_forward_mode(void) > return TEST_SUCCESS; > } >=20 > +static int > +test_asym_op_forward_mode(uint8_t session_less) { > + const struct rte_cryptodev_asymmetric_xform_capability *capability; > + struct rte_cryptodev_asym_capability_idx cap_idx; > + struct rte_crypto_asym_xform xform_tc; > + union rte_event_crypto_metadata m_data; > + struct rte_cryptodev_info dev_info; > + struct rte_crypto_asym_op *asym_op; > + struct rte_crypto_op *op; > + uint8_t input[4096] =3D {0}; > + uint8_t *result =3D NULL; > + struct rte_event ev; > + void *sess =3D NULL; > + uint32_t cap; > + int ret; > + > + memset(&m_data, 0, sizeof(m_data)); > + > + rte_cryptodev_info_get(TEST_CDEV_ID, &dev_info); > + if (session_less && !(dev_info.feature_flags & > + RTE_CRYPTODEV_FF_ASYM_SESSIONLESS)) { > + RTE_LOG(INFO, USER1, > + "Device doesn't support Asym sessionless ops. Test > Skipped\n"); > + return TEST_SKIPPED; > + } > + /* Setup Cipher Parameters */ > + xform_tc.next =3D NULL; > + xform_tc.xform_type =3D RTE_CRYPTO_ASYM_XFORM_MODEX; > + cap_idx.type =3D xform_tc.xform_type; > + capability =3D rte_cryptodev_asym_capability_get(TEST_CDEV_ID, > +&cap_idx); > + > + if (capability =3D=3D NULL) { > + RTE_LOG(INFO, USER1, > + "Device doesn't support MODEX. Test Skipped\n"); > + return TEST_SKIPPED; > + } > + > + op =3D rte_crypto_op_alloc(params.asym_op_mpool, > + RTE_CRYPTO_OP_TYPE_ASYMMETRIC); > + TEST_ASSERT_NOT_NULL(op, > + "Failed to allocate asymmetric crypto operation struct\n"); > + > + asym_op =3D op->asym; > + > + result =3D rte_zmalloc(NULL, modex_test_case.result_len, 0); > + xform_tc.modex.modulus.data =3D modex_test_case.modulus.data; > + xform_tc.modex.modulus.length =3D modex_test_case.modulus.len; > + xform_tc.modex.exponent.data =3D modex_test_case.exponent.data; > + xform_tc.modex.exponent.length =3D modex_test_case.exponent.len; > + memcpy(input, modex_test_case.base.data, > + modex_test_case.base.len); > + asym_op->modex.base.data =3D input; > + asym_op->modex.base.length =3D modex_test_case.base.len; > + asym_op->modex.result.data =3D result; > + asym_op->modex.result.length =3D modex_test_case.result_len; > + if (rte_cryptodev_asym_xform_capability_check_modlen(capability, > + xform_tc.modex.modulus.length)) { > + RTE_LOG(INFO, USER1, > + "line %u FAILED: %s", __LINE__, > + "Invalid MODULUS length specified"); > + return TEST_FAILED; > + } > + > + if (!session_less) { > + /* Create Crypto session*/ > + ret =3D rte_cryptodev_asym_session_create(TEST_CDEV_ID, > + &xform_tc, params.asym_sess_mpool, &sess); > + TEST_ASSERT_SUCCESS(ret, "Failed to init session\n"); > + > + ret =3D rte_event_crypto_adapter_caps_get(evdev, > TEST_CDEV_ID, > + &cap); > + TEST_ASSERT_SUCCESS(ret, "Failed to get adapter > capabilities\n"); > + > + if (cap & > RTE_EVENT_CRYPTO_ADAPTER_CAP_SESSION_PRIVATE_DATA) { > + /* Fill in private user data information */ > + m_data.request_info.cdev_id =3D request_info.cdev_id; > + m_data.request_info.queue_pair_id =3D > + request_info.queue_pair_id; > + m_data.response_info.event =3D response_info.event; > + > rte_cryptodev_session_event_mdata_set(TEST_CDEV_ID, > + sess, > RTE_CRYPTO_OP_TYPE_ASYMMETRIC, > + RTE_CRYPTO_OP_WITH_SESSION, > + &m_data, sizeof(m_data)); > + } > + > + rte_crypto_op_attach_asym_session(op, sess); > + } else { > + op->sess_type =3D RTE_CRYPTO_OP_SESSIONLESS; > + asym_op->xform =3D &xform_tc; > + op->private_data_offset =3D (sizeof(struct rte_crypto_op) + > + sizeof(struct rte_crypto_asym_op) + > + DEFAULT_NUM_XFORMS * > + sizeof(struct rte_crypto_asym_xform)); > + /* Fill in private data information */ > + m_data.request_info.cdev_id =3D request_info.cdev_id; > + m_data.request_info.queue_pair_id =3D > request_info.queue_pair_id; > + m_data.response_info.event =3D response_info.event; > + rte_memcpy((uint8_t *)op + op->private_data_offset, > + &m_data, sizeof(m_data)); > + } > + /* Fill in event info and update event_ptr with rte_crypto_op */ > + memset(&ev, 0, sizeof(ev)); > + ev.queue_id =3D TEST_CRYPTO_EV_QUEUE_ID; > + ev.sched_type =3D RTE_SCHED_TYPE_ATOMIC; > + ev.flow_id =3D 0xAABB; > + ev.event_ptr =3D op; > + > + ret =3D send_recv_ev(&ev); > + TEST_ASSERT_SUCCESS(ret, "Failed to send/receive event to " > + "crypto adapter\n"); > + > + test_crypto_adapter_stats(); > + > + return TEST_SUCCESS; > +} > + > + > +static int > +test_asym_sessionless_with_op_forward_mode(void) > +{ > + uint32_t cap; > + int ret; > + > + ret =3D rte_event_crypto_adapter_caps_get(evdev, TEST_CDEV_ID, > &cap); > + TEST_ASSERT_SUCCESS(ret, "Failed to get adapter capabilities\n"); > + > + if (!(cap & > RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_FWD) && > + !(cap & > RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_NEW)) > + map_adapter_service_core(); > + else { > + if (!(cap & > RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_FWD)) > + return TEST_SKIPPED; > + } > + > + > TEST_ASSERT_SUCCESS(rte_event_crypto_adapter_start(TEST_ADAPTE > R_ID), > + "Failed to start event crypto adapter"); > + > + return test_asym_op_forward_mode(1); > +} > + > +static int > +test_asym_session_with_op_forward_mode(void) > +{ > + uint32_t cap; > + int ret; > + > + ret =3D rte_event_crypto_adapter_caps_get(evdev, TEST_CDEV_ID, > &cap); > + TEST_ASSERT_SUCCESS(ret, "Failed to get adapter capabilities\n"); > + > + if (!(cap & > RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_FWD) && > + !(cap & > RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_NEW)) > + map_adapter_service_core(); > + else { > + if (!(cap & > RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_FWD)) > + return TEST_SKIPPED; > + } > + > + > TEST_ASSERT_SUCCESS(rte_event_crypto_adapter_start(TEST_ADAPTE > R_ID > + ), "Failed to start event crypto adapter"); > + > + return test_asym_op_forward_mode(0); > +} > + > static int > send_op_recv_ev(struct rte_crypto_op *op) { @@ -365,11 +628,24 @@ > send_op_recv_ev(struct rte_crypto_op *op) > rte_pause(); >=20 > recv_op =3D ev.event_ptr; > + if (recv_op->type =3D=3D RTE_CRYPTO_OP_TYPE_SYMMETRIC) { > #if PKT_TRACE > - struct rte_mbuf *m =3D recv_op->sym->m_src; > - rte_pktmbuf_dump(stdout, m, rte_pktmbuf_pkt_len(m)); > + struct rte_mbuf *m =3D recv_op->sym->m_src; > + rte_pktmbuf_dump(stdout, m, rte_pktmbuf_pkt_len(m)); > #endif > - rte_pktmbuf_free(recv_op->sym->m_src); > + rte_pktmbuf_free(recv_op->sym->m_src); > + } else { > + uint8_t *data_expected =3D NULL, *data_received =3D NULL; > + uint32_t data_size; > + > + data_expected =3D modex_test_case.reminder.data; > + data_received =3D op->asym->modex.result.data; > + data_size =3D op->asym->modex.result.length; > + ret =3D memcmp(data_expected, data_received, data_size); > + TEST_ASSERT_EQUAL(ret, 0, > + "Data mismatch for asym crypto adapter\n"); > + rte_free(op->asym->modex.result.data); > + } > rte_crypto_op_free(recv_op); >=20 > return TEST_SUCCESS; > @@ -505,6 +781,156 @@ test_session_with_op_new_mode(void) > return TEST_SUCCESS; > } >=20 > +static int > +test_asym_op_new_mode(uint8_t session_less) { > + const struct rte_cryptodev_asymmetric_xform_capability *capability; > + struct rte_cryptodev_asym_capability_idx cap_idx; > + struct rte_crypto_asym_xform xform_tc; > + union rte_event_crypto_metadata m_data; > + struct rte_cryptodev_info dev_info; > + struct rte_crypto_asym_op *asym_op; > + struct rte_crypto_op *op; > + uint8_t input[4096] =3D {0}; > + uint8_t *result =3D NULL; > + void *sess =3D NULL; > + uint32_t cap; > + int ret; > + > + memset(&m_data, 0, sizeof(m_data)); > + > + rte_cryptodev_info_get(TEST_CDEV_ID, &dev_info); > + if (session_less && !(dev_info.feature_flags & > + RTE_CRYPTODEV_FF_ASYM_SESSIONLESS)) { > + RTE_LOG(INFO, USER1, > + "Device doesn't support Asym sessionless ops. Test > Skipped\n"); > + return TEST_SKIPPED; > + } > + /* Setup Cipher Parameters */ > + xform_tc.next =3D NULL; > + xform_tc.xform_type =3D RTE_CRYPTO_ASYM_XFORM_MODEX; > + cap_idx.type =3D xform_tc.xform_type; > + capability =3D rte_cryptodev_asym_capability_get(TEST_CDEV_ID, > +&cap_idx); > + > + if (capability =3D=3D NULL) { > + RTE_LOG(INFO, USER1, > + "Device doesn't support MODEX. Test Skipped\n"); > + return TEST_SKIPPED; > + } > + > + op =3D rte_crypto_op_alloc(params.asym_op_mpool, > + RTE_CRYPTO_OP_TYPE_ASYMMETRIC); > + TEST_ASSERT_NOT_NULL(op, "Failed to allocate asym crypto_op!\n"); > + > + asym_op =3D op->asym; > + > + result =3D rte_zmalloc(NULL, modex_test_case.result_len, 0); > + xform_tc.modex.modulus.data =3D modex_test_case.modulus.data; > + xform_tc.modex.modulus.length =3D modex_test_case.modulus.len; > + xform_tc.modex.exponent.data =3D modex_test_case.exponent.data; > + xform_tc.modex.exponent.length =3D modex_test_case.exponent.len; > + memcpy(input, modex_test_case.base.data, > + modex_test_case.base.len); > + asym_op->modex.base.data =3D input; > + asym_op->modex.base.length =3D modex_test_case.base.len; > + asym_op->modex.result.data =3D result; > + asym_op->modex.result.length =3D modex_test_case.result_len; > + if (rte_cryptodev_asym_xform_capability_check_modlen(capability, > + xform_tc.modex.modulus.length)) { > + RTE_LOG(INFO, USER1, > + "line %u FAILED: %s", __LINE__, > + "Invalid MODULUS length specified"); > + return TEST_FAILED; > + } > + > + if (!session_less) { > + ret =3D rte_cryptodev_asym_session_create(TEST_CDEV_ID, > + &xform_tc, params.asym_sess_mpool, &sess); > + TEST_ASSERT_NOT_NULL(sess, "Session creation failed\n"); > + TEST_ASSERT_SUCCESS(ret, "Failed to init session\n"); > + > + ret =3D rte_event_crypto_adapter_caps_get(evdev, > TEST_CDEV_ID, > + &cap); > + TEST_ASSERT_SUCCESS(ret, "Failed to get adapter > capabilities\n"); > + > + if (cap & > RTE_EVENT_CRYPTO_ADAPTER_CAP_SESSION_PRIVATE_DATA) { > + /* Fill in private user data information */ > + m_data.response_info.event =3D response_info.event; > + > rte_cryptodev_session_event_mdata_set(TEST_CDEV_ID, > + sess, > RTE_CRYPTO_OP_TYPE_ASYMMETRIC, > + RTE_CRYPTO_OP_WITH_SESSION, > + &m_data, sizeof(m_data)); > + } > + > + rte_crypto_op_attach_asym_session(op, sess); > + } else { > + op->sess_type =3D RTE_CRYPTO_OP_SESSIONLESS; > + asym_op->xform =3D &xform_tc; > + op->private_data_offset =3D (sizeof(struct rte_crypto_op) + > + sizeof(struct rte_crypto_asym_op) + > + DEFAULT_NUM_XFORMS * > + sizeof(struct rte_crypto_asym_xform)); > + /* Fill in private data information */ > + m_data.response_info.event =3D response_info.event; > + rte_memcpy((uint8_t *)op + op->private_data_offset, > + &m_data, sizeof(m_data)); > + } > + > + ret =3D send_op_recv_ev(op); > + TEST_ASSERT_SUCCESS(ret, "Failed to enqueue op to cryptodev\n"); > + > + test_crypto_adapter_stats(); > + > + return TEST_SUCCESS; > +} > + > +static int > +test_asym_sessionless_with_op_new_mode(void) > +{ > + uint32_t cap; > + int ret; > + > + ret =3D rte_event_crypto_adapter_caps_get(evdev, TEST_CDEV_ID, > &cap); > + TEST_ASSERT_SUCCESS(ret, "Failed to get adapter capabilities\n"); > + > + if (!(cap & > RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_FWD) && > + !(cap & > RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_NEW)) > + map_adapter_service_core(); > + else { > + if (!(cap & > RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_NEW)) > + return TEST_SKIPPED; > + } > + > + /* start the event crypto adapter */ > + > TEST_ASSERT_SUCCESS(rte_event_crypto_adapter_start(TEST_ADAPTE > R_ID), > + "Failed to start event crypto adapter"); > + > + return test_asym_op_new_mode(1); > +} > + > +static int > +test_asym_session_with_op_new_mode(void) > +{ > + uint32_t cap; > + int ret; > + > + ret =3D rte_event_crypto_adapter_caps_get(evdev, TEST_CDEV_ID, > &cap); > + TEST_ASSERT_SUCCESS(ret, "Failed to get adapter capabilities\n"); > + > + if (!(cap & > RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_FWD) && > + !(cap & > RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_NEW)) > + map_adapter_service_core(); > + else { > + if (!(cap & > RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_NEW)) > + return TEST_SKIPPED; > + } > + > + > TEST_ASSERT_SUCCESS(rte_event_crypto_adapter_start(TEST_ADAPTE > R_ID), > + "Failed to start event crypto adapter"); > + > + return test_asym_op_new_mode(0); > +} > + > static int > configure_cryptodev(void) > { > @@ -537,6 +963,19 @@ configure_cryptodev(void) > RTE_LOG(ERR, USER1, "Can't create CRYPTO_OP_POOL\n"); > return TEST_FAILED; > } > + params.asym_op_mpool =3D rte_crypto_op_pool_create( > + "EVENT_CRYPTO_ASYM_OP_POOL", > + RTE_CRYPTO_OP_TYPE_ASYMMETRIC, > + NUM_MBUFS, MBUF_CACHE_SIZE, > + (DEFAULT_NUM_XFORMS * > + sizeof(struct rte_crypto_asym_xform)) + > + sizeof(union rte_event_crypto_metadata), > + rte_socket_id()); > + if (params.asym_op_mpool =3D=3D NULL) { > + RTE_LOG(ERR, USER1, "Can't create > CRYPTO_ASYM_OP_POOL\n"); > + return TEST_FAILED; > + } > + >=20 > /* Create a NULL crypto device */ > nb_devs =3D rte_cryptodev_device_count_by_driver( > @@ -581,6 +1020,15 @@ configure_cryptodev(void) > TEST_ASSERT_NOT_NULL(params.session_priv_mpool, > "session mempool allocation failed\n"); >=20 > + params.asym_sess_mpool =3D rte_cryptodev_asym_session_pool_create( > + "CRYPTO_AD_ASYM_SESS_MP", > + MAX_NB_SESSIONS, 0, > + sizeof(union rte_event_crypto_metadata), > + SOCKET_ID_ANY); > + TEST_ASSERT_NOT_NULL(params.asym_sess_mpool, > + "asym session mempool allocation failed\n"); > + > + > rte_cryptodev_info_get(TEST_CDEV_ID, &info); > conf.nb_queue_pairs =3D info.max_nb_queue_pairs; > conf.socket_id =3D SOCKET_ID_ANY; > @@ -960,6 +1408,21 @@ crypto_teardown(void) > params.session_priv_mpool =3D NULL; > } >=20 > + /* Free asym session mempool */ > + if (params.asym_sess_mpool !=3D NULL) { > + RTE_LOG(DEBUG, USER1, "CRYPTO_AD_ASYM_SESS_MP count > %u\n", > + rte_mempool_avail_count(params.asym_sess_mpool)); > + rte_mempool_free(params.asym_sess_mpool); > + params.asym_sess_mpool =3D NULL; > + } > + /* Free asym ops mempool */ > + if (params.asym_op_mpool !=3D NULL) { > + RTE_LOG(DEBUG, USER1, "EVENT_CRYPTO_ASYM_OP_POOL > count %u\n", > + rte_mempool_avail_count(params.asym_op_mpool)); > + rte_mempool_free(params.asym_op_mpool); > + params.asym_op_mpool =3D NULL; > + } > + > /* Free ops mempool */ > if (params.op_mpool !=3D NULL) { > RTE_LOG(DEBUG, USER1, "EVENT_CRYPTO_SYM_OP_POOL > count %u\n", @@ -1016,6 +1479,22 @@ static struct unit_test_suite > functional_testsuite =3D { > test_crypto_adapter_stop, > test_sessionless_with_op_new_mode), >=20 > + TEST_CASE_ST(test_crypto_adapter_conf_op_forward_mode, > + test_crypto_adapter_stop, > + test_asym_session_with_op_forward_mode), > + > + TEST_CASE_ST(test_crypto_adapter_conf_op_forward_mode, > + test_crypto_adapter_stop, > + > test_asym_sessionless_with_op_forward_mode), > + > + TEST_CASE_ST(test_crypto_adapter_conf_op_new_mode, > + test_crypto_adapter_stop, > + test_asym_session_with_op_new_mode), > + > + TEST_CASE_ST(test_crypto_adapter_conf_op_new_mode, > + test_crypto_adapter_stop, > + test_asym_sessionless_with_op_new_mode), > + > TEST_CASES_END() /**< NULL terminate unit test array */ > } > }; > -- > 2.25.1