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PH0PR18MB4086.namprd18.prod.outlook.com (2603:10b6:510:3::9) by CO6PR18MB3876.namprd18.prod.outlook.com (2603:10b6:5:344::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6455.33; Wed, 7 Jun 2023 15:12:00 +0000 Received: from PH0PR18MB4086.namprd18.prod.outlook.com ([fe80::600f:e50f:8159:d89]) by PH0PR18MB4086.namprd18.prod.outlook.com ([fe80::600f:e50f:8159:d89%6]) with mapi id 15.20.6455.030; Wed, 7 Jun 2023 15:11:59 +0000 From: Pavan Nikhilesh Bhagavatula To: Ruifeng Wang , "bruce.richardson@intel.com" CC: "dev@dpdk.org" , Jerin Jacob Kollanukkaran , "honnappa.nagarahalli@arm.com" , "feifei.wang2@arm.com" , "nd@arm.com" Subject: RE: [EXT] [PATCH 1/2] config/arm: update config for Neoverse N2 Thread-Topic: [EXT] [PATCH 1/2] config/arm: update config for Neoverse N2 Thread-Index: AQHZkfKNen7w1ACsrUCYYQQGaISLBK9/fqQw Date: Wed, 7 Jun 2023 15:11:59 +0000 Message-ID: References: <20230529055751.3035712-1-ruifeng.wang@arm.com> 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(UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: s/jZpBawVZXXpVE5wglVCrJXqBbomsk5Tc9xEq8pNy/n8suvRdAHxSXrSy0qZHZWcwjXVhlwZNOcWqykaVU4YGkjSLW9bqKBvsJPpWR/bEI= X-MS-Exchange-Transport-CrossTenantHeadersStamped: CO6PR18MB3876 X-Proofpoint-ORIG-GUID: D7Rgw6ta31e7XWMP52R45jXWmtaubCMA X-Proofpoint-GUID: D7Rgw6ta31e7XWMP52R45jXWmtaubCMA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-06-07_07,2023-06-07_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > Updated maximum number of lcores and numa nodes to support platforms > with multiple numa nodes. > Added mcpu compiler option. >=20 > Signed-off-by: Ruifeng Wang > Reviewed-by: Feifei Wang > --- > config/arm/meson.build | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) >=20 > diff --git a/config/arm/meson.build b/config/arm/meson.build > index 5213434ca4..9e55e9f2a4 100644 > --- a/config/arm/meson.build > +++ b/config/arm/meson.build > @@ -91,11 +91,12 @@ part_number_config_arm =3D { > '0xd49': { > 'march': 'armv8.5-a', > 'march_features': ['sve2'], > + 'compiler_options': ['-mcpu=3Dneoverse-n2'], Hi Ruifeng,=20 I see the following warning when compiling with GCC 12 cc1: warning: switch '-mcpu=3Dneoverse-n2' conflicts with '-march=3Darmv8.5= -a+sve2+crypto' switch Removing 'armv8.5-a' from the list makes the warning go away but what's the= correct march for neoverse-n2? Armv9.0-a is not a supported march flag in GCC. > 'flags': [ > ['RTE_MACHINE', '"neoverse-n2"'], > ['RTE_ARM_FEATURE_ATOMICS', true], > - ['RTE_MAX_LCORE', 64], > - ['RTE_MAX_NUMA_NODES', 1] > + ['RTE_MAX_LCORE', 128], > + ['RTE_MAX_NUMA_NODES', 2] > ] > } > } > -- > 2.25.1