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Tue, 11 May 2021 08:57:11 +0000 From: Pavan Nikhilesh Bhagavatula To: Honnappa Nagarahalli , "thomas@monjalon.net" CC: Jerin Jacob Kollanukkaran , "juraj.linkes@pantheon.tech" , Jan Viktorin , Ruifeng Wang , Bruce Richardson , "dev@dpdk.org" , nd , nd Thread-Topic: [dpdk-dev] [EXT] Re: [PATCH] config/arm: add ability to express arch extensions Thread-Index: AQHXRcDmsL32CYMdQ0atcuDOTTlhFKrc/LSAgAA5MoCAAAVvAIAAvWjQ Date: Tue, 11 May 2021 08:57:11 +0000 Message-ID: References: <20210505121423.850-1-pbhagavatula@marvell.com> <1699304.vFISr3HHSL@thomas> In-Reply-To: Accept-Language: en-IN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: arm.com; dkim=none (message not signed) header.d=none;arm.com; dmarc=none action=none header.from=marvell.com; x-originating-ip: [2405:201:d009:304d:3168:d7df:fe47:75c6] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 28a8c6dd-4846-46db-8474-08d9145ac3de x-ms-traffictypediagnostic: PH0PR18MB3847: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:2000; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: marvell.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PH0PR18MB4086.namprd18.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 28a8c6dd-4846-46db-8474-08d9145ac3de X-MS-Exchange-CrossTenant-originalarrivaltime: 11 May 2021 08:57:11.3655 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: EvXsKyFMaA22R0w1Xra1wqJKA1pWHbjPv/RuIrX7vvdM/bY8cAYQJvcMde2AbBtGNJNUE/xh8BK/lbD4myIGm+8upPYGuQtml0MFK3oLovo= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR18MB3847 X-Proofpoint-GUID: 3UI86MiWfGektdidQ6YBiFyafz41apgB X-Proofpoint-ORIG-GUID: 3UI86MiWfGektdidQ6YBiFyafz41apgB X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-05-11_02:2021-05-10, 2021-05-11 signatures=0 Subject: Re: [dpdk-dev] [EXT] Re: [PATCH] config/arm: add ability to express arch extensions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > > >> >> > >> > The patch still holds true for CRC though as it is listed separately >> > below >> > https://urldefense.proofpoint.com/v2/url?u=3Dhttps- >3A__developer.arm.com_architectures_cpu-2Darchitecture_a- >2D&d=3DDwIFAg&c=3DnKjWec2b6R0mOyPaz7xtfQ&r=3DE3SgYMjtKCMVsB- >fmvgGV3o- >g_fjLhk5Pupi9ijohpc&m=3Di3kC8htMiHjXMoJWUn6QlDVZQCblbFrIJyMcW >d9nAmM&s=3DfA4SM6O3iC2HXIK1qSbOHzxVeHoYqcfUebEOwioHC7c&e=3D >> > profile/exploration-tools/feature-names-for-a-profile >CRC is mandatory starting in V8.1, refer to Arm-ARM document. > >> > >> > Also, looks like sve2 support in n2 core might be optional as per >above doc? >> I need to check on this. Some of the info here might not be public yet. >I found [1]. SVE2 is mandatory feature. > I see thanks for the info I will remove extension from cnxk. Do you think the extension infra is still useful for other cases? i.e. olde= r=20 cores or cases where vendor wants to enable some extensions by default? I found a document[1] which describes about extensions not enabled by defau= lt but supported by a given march. In case of n2 I think memory tagging is one such feature [1]https://developer.arm.com/tools-and-software/open-source-software/develo= per-tools/gnu-toolchain/architecture-support >[1] https://urldefense.proofpoint.com/v2/url?u=3Dhttps- >3A__developer.arm.com_ip- >2Dproducts_processors_neoverse_neoverse- >2Dn2&d=3DDwIFAg&c=3DnKjWec2b6R0mOyPaz7xtfQ&r=3DE3SgYMjtKCMVsB- >fmvgGV3o- >g_fjLhk5Pupi9ijohpc&m=3Di3kC8htMiHjXMoJWUn6QlDVZQCblbFrIJyMcW >d9nAmM&s=3DkP_X-Co0cl4pZ64BZqy5rAFUlkMZE-3EhTVBabm3SW8&e=3D > >