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Fri, 7 Oct 2022 20:22:01 +0000 From: Shijith Thotton To: Olivier Matz CC: "dev@dpdk.org" , Pavan Nikhilesh Bhagavatula , "Honnappa.Nagarahalli@arm.com" , "bruce.richardson@intel.com" , Jerin Jacob Kollanukkaran , "mb@smartsharesystems.com" , "stephen@networkplumber.org" , "thomas@monjalon.net" , "david.marchand@redhat.com" , Ruifeng Wang , Jan Viktorin , Nithin Kumar Dabilpuram , Kiran Kumar Kokkilagadda , Sunil Kumar Kori , Satha Koteswara Rao Kottidi , Ankur Dwivedi , Anoob Joseph , Tejasree Kondoj , Radha Chintakuntla , Veerasenareddy Burru , Ashwin Sekhar T K , Jakub Palider , Tomasz Duszynski Subject: RE: [EXT] Re: [PATCH v3 4/5] drivers: mark Marvell cnxk PMDs work with IOVA as VA Thread-Topic: [EXT] Re: [PATCH v3 4/5] drivers: mark Marvell cnxk PMDs work with IOVA as VA Thread-Index: AQHYzcIKjyIbiG2iSUK5tuExHMOwYa4DeCUAgAAA76A= Date: Fri, 7 Oct 2022 20:22:00 +0000 Message-ID: References: <20220907134340.3629224-1-sthotton@marvell.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-publictraffictype: Email x-ms-traffictypediagnostic: PH0PR18MB4425:EE_|DM6PR18MB3538:EE_ x-ms-office365-filtering-correlation-id: 59267b2a-f8ab-47a9-98cd-08daa8a19766 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: marvell.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PH0PR18MB4425.namprd18.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 59267b2a-f8ab-47a9-98cd-08daa8a19766 X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Oct 2022 20:22:00.9006 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: oJ39POxMvWl2ztbpuUSaLnW+6Dc9AKEIg2MImXFd1fdodHfBMDJa/VzKDEZWhk7X3PG4WTSf42VQOqTHzx8sYg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR18MB3538 X-Proofpoint-GUID: Z94obMkkrMREkjFY495lYpXxgy30A1CV X-Proofpoint-ORIG-GUID: Z94obMkkrMREkjFY495lYpXxgy30A1CV X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-10-07_04,2022-10-07_01,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org >> Enabled the flag pmd_iova_as_va in cnxk driver build files as they work >> with IOVA as VA. Updated cn9k and cn10k soc build configurations to >> enable the IOVA as VA build by default. >> >> Signed-off-by: Shijith Thotton >> --- >> config/arm/meson.build | 8 +++- >> drivers/common/cnxk/meson.build | 1 + >> drivers/crypto/cnxk/cn10k_ipsec_la_ops.h | 4 +- >> drivers/crypto/cnxk/cn9k_ipsec_la_ops.h | 2 +- >> drivers/crypto/cnxk/meson.build | 2 + >> drivers/dma/cnxk/meson.build | 1 + >> drivers/event/cnxk/meson.build | 1 + >> drivers/mempool/cnxk/meson.build | 1 + >> drivers/net/cnxk/cn10k_tx.h | 55 +++++++----------------- >> drivers/net/cnxk/cn9k_tx.h | 55 +++++++----------------- >> drivers/net/cnxk/cnxk_ethdev.h | 1 - >> drivers/net/cnxk/meson.build | 1 + >> drivers/raw/cnxk_bphy/meson.build | 1 + >> drivers/raw/cnxk_gpio/meson.build | 1 + >> 14 files changed, 50 insertions(+), 84 deletions(-) >> >> diff --git a/config/arm/meson.build b/config/arm/meson.build >> index 9f1636e0d5..4e95e8b388 100644 >> --- a/config/arm/meson.build >> +++ b/config/arm/meson.build >> @@ -294,7 +294,8 @@ soc_cn10k =3D { >> 'flags': [ >> ['RTE_MAX_LCORE', 24], >> ['RTE_MAX_NUMA_NODES', 1], >> - ['RTE_MEMPOOL_ALIGN', 128] >> + ['RTE_MEMPOOL_ALIGN', 128], >> + ['RTE_IOVA_AS_VA', 1] >> ], >> 'part_number': '0xd49', >> 'extra_march_features': ['crypto'], >> @@ -370,7 +371,10 @@ soc_cn9k =3D { >> 'description': 'Marvell OCTEON 9', >> 'implementer': '0x43', >> 'part_number': '0xb2', >> - 'numa': false >> + 'numa': false, >> + 'flags': [ >> + ['RTE_IOVA_AS_VA', 1] >> + ] >> } >> >> soc_stingray =3D { >> diff --git a/drivers/common/cnxk/meson.build >b/drivers/common/cnxk/meson.build >> index 6f808271d1..d019cfa8d1 100644 >> --- a/drivers/common/cnxk/meson.build >> +++ b/drivers/common/cnxk/meson.build >> @@ -86,3 +86,4 @@ sources +=3D files('cnxk_telemetry_bphy.c', >> ) >> >> deps +=3D ['bus_pci', 'net', 'telemetry'] >> +pmd_iova_as_va =3D true >> diff --git a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h >b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h >> index 66cfe6ca98..16db14344d 100644 >> --- a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h >> +++ b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h >> @@ -85,7 +85,7 @@ process_outb_sa(struct roc_cpt_lf *lf, struct rte_cryp= to_op >*cop, >> >> /* Prepare CPT instruction */ >> inst->w4.u64 =3D inst_w4_u64 | rte_pktmbuf_pkt_len(m_src); >> - dptr =3D rte_pktmbuf_iova(m_src); >> + dptr =3D rte_pktmbuf_mtod(m_src, uint64_t); >> inst->dptr =3D dptr; >> inst->rptr =3D dptr; >> >> @@ -102,7 +102,7 @@ process_inb_sa(struct rte_crypto_op *cop, struct >cn10k_ipsec_sa *sa, >> >> /* Prepare CPT instruction */ >> inst->w4.u64 =3D sa->inst.w4 | rte_pktmbuf_pkt_len(m_src); >> - dptr =3D rte_pktmbuf_iova(m_src); >> + dptr =3D rte_pktmbuf_mtod(m_src, uint64_t); >> inst->dptr =3D dptr; >> inst->rptr =3D dptr; >> >> diff --git a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h >b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h >> index e469596756..8b68e4c728 100644 >> --- a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h >> +++ b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h >> @@ -99,7 +99,7 @@ process_inb_sa(struct rte_crypto_op *cop, struct >cn9k_ipsec_sa *sa, >> >> /* Prepare CPT instruction */ >> inst->w4.u64 =3D sa->inst.w4 | rte_pktmbuf_pkt_len(m_src); >> - inst->dptr =3D inst->rptr =3D rte_pktmbuf_iova(m_src); >> + inst->dptr =3D inst->rptr =3D rte_pktmbuf_mtod(m_src, uint64_t); >> inst->w7.u64 =3D sa->inst.w7; >> } >> #endif /* __CN9K_IPSEC_LA_OPS_H__ */ >> diff --git a/drivers/crypto/cnxk/meson.build b/drivers/crypto/cnxk/meson= .build >> index 23a1cc3aac..764e7bb99a 100644 >> --- a/drivers/crypto/cnxk/meson.build >> +++ b/drivers/crypto/cnxk/meson.build >> @@ -31,3 +31,5 @@ if get_option('buildtype').contains('debug') >> else >> cflags +=3D [ '-ULA_IPSEC_DEBUG' ] >> endif >> + >> +pmd_iova_as_va =3D true >> diff --git a/drivers/dma/cnxk/meson.build b/drivers/dma/cnxk/meson.build >> index d4be4ee860..ef0e3db109 100644 >> --- a/drivers/dma/cnxk/meson.build >> +++ b/drivers/dma/cnxk/meson.build >> @@ -3,3 +3,4 @@ >> >> deps +=3D ['bus_pci', 'common_cnxk', 'dmadev'] >> sources =3D files('cnxk_dmadev.c') >> +pmd_iova_as_va =3D true >> diff --git a/drivers/event/cnxk/meson.build b/drivers/event/cnxk/meson.b= uild >> index b27bae7b12..650d0d4256 100644 >> --- a/drivers/event/cnxk/meson.build >> +++ b/drivers/event/cnxk/meson.build >> @@ -479,3 +479,4 @@ foreach flag: extra_flags >> endforeach >> >> deps +=3D ['bus_pci', 'common_cnxk', 'net_cnxk', 'crypto_cnxk'] >> +pmd_iova_as_va =3D true >> diff --git a/drivers/mempool/cnxk/meson.build >b/drivers/mempool/cnxk/meson.build >> index d5d1978569..a328176457 100644 >> --- a/drivers/mempool/cnxk/meson.build >> +++ b/drivers/mempool/cnxk/meson.build >> @@ -17,3 +17,4 @@ sources =3D files( >> ) >> >> deps +=3D ['eal', 'mbuf', 'kvargs', 'bus_pci', 'common_cnxk', 'mempool'= ] >> +pmd_iova_as_va =3D true >> diff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h >> index ea13866b20..2ef62da132 100644 >> --- a/drivers/net/cnxk/cn10k_tx.h >> +++ b/drivers/net/cnxk/cn10k_tx.h >> @@ -1775,14 +1775,6 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, >uint64_t *ws, >> mbuf2 =3D (uint64_t *)tx_pkts[2]; >> mbuf3 =3D (uint64_t *)tx_pkts[3]; >> >> - mbuf0 =3D (uint64_t *)((uintptr_t)mbuf0 + >> - offsetof(struct rte_mbuf, buf_iova)); >> - mbuf1 =3D (uint64_t *)((uintptr_t)mbuf1 + >> - offsetof(struct rte_mbuf, buf_iova)); >> - mbuf2 =3D (uint64_t *)((uintptr_t)mbuf2 + >> - offsetof(struct rte_mbuf, buf_iova)); >> - mbuf3 =3D (uint64_t *)((uintptr_t)mbuf3 + >> - offsetof(struct rte_mbuf, buf_iova)); >> /* >> * Get mbuf's, olflags, iova, pktlen, dataoff >> * dataoff_iovaX.D[0] =3D iova, >> @@ -1790,28 +1782,24 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, >uint64_t *ws, >> * len_olflagsX.D[0] =3D ol_flags, >> * len_olflagsX.D[1](63:32) =3D mbuf->pkt_len >> */ >> - dataoff_iova0 =3D vld1q_u64(mbuf0); >> - len_olflags0 =3D vld1q_u64(mbuf0 + 2); >> - dataoff_iova1 =3D vld1q_u64(mbuf1); >> - len_olflags1 =3D vld1q_u64(mbuf1 + 2); >> - dataoff_iova2 =3D vld1q_u64(mbuf2); >> - len_olflags2 =3D vld1q_u64(mbuf2 + 2); >> - dataoff_iova3 =3D vld1q_u64(mbuf3); >> - len_olflags3 =3D vld1q_u64(mbuf3 + 2); >> + dataoff_iova0 =3D >> + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off, >vld1q_u64(mbuf0), 1); >> + len_olflags0 =3D vld1q_u64(mbuf0 + 3); >> + dataoff_iova1 =3D >> + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off, >vld1q_u64(mbuf1), 1); >> + len_olflags1 =3D vld1q_u64(mbuf1 + 3); >> + dataoff_iova2 =3D >> + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off, >vld1q_u64(mbuf2), 1); >> + len_olflags2 =3D vld1q_u64(mbuf2 + 3); >> + dataoff_iova3 =3D >> + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off, >vld1q_u64(mbuf3), 1); >> + len_olflags3 =3D vld1q_u64(mbuf3 + 3); >> >> /* Move mbufs to point pool */ >> - mbuf0 =3D (uint64_t *)((uintptr_t)mbuf0 + >> - offsetof(struct rte_mbuf, pool) - >> - offsetof(struct rte_mbuf, buf_iova)); >> - mbuf1 =3D (uint64_t *)((uintptr_t)mbuf1 + >> - offsetof(struct rte_mbuf, pool) - >> - offsetof(struct rte_mbuf, buf_iova)); >> - mbuf2 =3D (uint64_t *)((uintptr_t)mbuf2 + >> - offsetof(struct rte_mbuf, pool) - >> - offsetof(struct rte_mbuf, buf_iova)); >> - mbuf3 =3D (uint64_t *)((uintptr_t)mbuf3 + >> - offsetof(struct rte_mbuf, pool) - >> - offsetof(struct rte_mbuf, buf_iova)); >> + mbuf0 =3D (uint64_t *)((uintptr_t)mbuf0 + offsetof(struct rte_mbuf, >pool)); >> + mbuf1 =3D (uint64_t *)((uintptr_t)mbuf1 + offsetof(struct rte_mbuf, >pool)); >> + mbuf2 =3D (uint64_t *)((uintptr_t)mbuf2 + offsetof(struct rte_mbuf, >pool)); >> + mbuf3 =3D (uint64_t *)((uintptr_t)mbuf3 + offsetof(struct rte_mbuf, >pool)); >> >> if (flags & (NIX_TX_OFFLOAD_OL3_OL4_CSUM_F | >> NIX_TX_OFFLOAD_L3_L4_CSUM_F)) { >> @@ -1861,17 +1849,6 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue, >uint64_t *ws, >> xtmp128 =3D vzip2q_u64(len_olflags0, len_olflags1); >> ytmp128 =3D vzip2q_u64(len_olflags2, len_olflags3); >> >> - /* Clear dataoff_iovaX.D[1] bits other than dataoff(15:0) */ >> - const uint64x2_t and_mask0 =3D { >> - 0xFFFFFFFFFFFFFFFF, >> - 0x000000000000FFFF, >> - }; >> - >> - dataoff_iova0 =3D vandq_u64(dataoff_iova0, and_mask0); >> - dataoff_iova1 =3D vandq_u64(dataoff_iova1, and_mask0); >> - dataoff_iova2 =3D vandq_u64(dataoff_iova2, and_mask0); >> - dataoff_iova3 =3D vandq_u64(dataoff_iova3, and_mask0); >> - >> /* >> * Pick only 16 bits of pktlen preset at bits 63:32 >> * and place them at bits 15:0. >> diff --git a/drivers/net/cnxk/cn9k_tx.h b/drivers/net/cnxk/cn9k_tx.h >> index 6ce81f5c96..f5d99ccb5a 100644 >> --- a/drivers/net/cnxk/cn9k_tx.h >> +++ b/drivers/net/cnxk/cn9k_tx.h >> @@ -1005,14 +1005,6 @@ cn9k_nix_xmit_pkts_vector(void *tx_queue, struct >rte_mbuf **tx_pkts, >> mbuf2 =3D (uint64_t *)tx_pkts[2]; >> mbuf3 =3D (uint64_t *)tx_pkts[3]; >> >> - mbuf0 =3D (uint64_t *)((uintptr_t)mbuf0 + >> - offsetof(struct rte_mbuf, buf_iova)); >> - mbuf1 =3D (uint64_t *)((uintptr_t)mbuf1 + >> - offsetof(struct rte_mbuf, buf_iova)); >> - mbuf2 =3D (uint64_t *)((uintptr_t)mbuf2 + >> - offsetof(struct rte_mbuf, buf_iova)); >> - mbuf3 =3D (uint64_t *)((uintptr_t)mbuf3 + >> - offsetof(struct rte_mbuf, buf_iova)); >> /* >> * Get mbuf's, olflags, iova, pktlen, dataoff >> * dataoff_iovaX.D[0] =3D iova, >> @@ -1020,28 +1012,24 @@ cn9k_nix_xmit_pkts_vector(void *tx_queue, struct >rte_mbuf **tx_pkts, >> * len_olflagsX.D[0] =3D ol_flags, >> * len_olflagsX.D[1](63:32) =3D mbuf->pkt_len >> */ >> - dataoff_iova0 =3D vld1q_u64(mbuf0); >> - len_olflags0 =3D vld1q_u64(mbuf0 + 2); >> - dataoff_iova1 =3D vld1q_u64(mbuf1); >> - len_olflags1 =3D vld1q_u64(mbuf1 + 2); >> - dataoff_iova2 =3D vld1q_u64(mbuf2); >> - len_olflags2 =3D vld1q_u64(mbuf2 + 2); >> - dataoff_iova3 =3D vld1q_u64(mbuf3); >> - len_olflags3 =3D vld1q_u64(mbuf3 + 2); >> + dataoff_iova0 =3D >> + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off, >vld1q_u64(mbuf0), 1); >> + len_olflags0 =3D vld1q_u64(mbuf0 + 3); >> + dataoff_iova1 =3D >> + vsetq_lane_u64(((struct rte_mbuf *)mbuf1)->data_off, >vld1q_u64(mbuf1), 1); >> + len_olflags1 =3D vld1q_u64(mbuf1 + 3); >> + dataoff_iova2 =3D >> + vsetq_lane_u64(((struct rte_mbuf *)mbuf2)->data_off, >vld1q_u64(mbuf2), 1); >> + len_olflags2 =3D vld1q_u64(mbuf2 + 3); >> + dataoff_iova3 =3D >> + vsetq_lane_u64(((struct rte_mbuf *)mbuf3)->data_off, >vld1q_u64(mbuf3), 1); >> + len_olflags3 =3D vld1q_u64(mbuf3 + 3); >> >> /* Move mbufs to point pool */ >> - mbuf0 =3D (uint64_t *)((uintptr_t)mbuf0 + >> - offsetof(struct rte_mbuf, pool) - >> - offsetof(struct rte_mbuf, buf_iova)); >> - mbuf1 =3D (uint64_t *)((uintptr_t)mbuf1 + >> - offsetof(struct rte_mbuf, pool) - >> - offsetof(struct rte_mbuf, buf_iova)); >> - mbuf2 =3D (uint64_t *)((uintptr_t)mbuf2 + >> - offsetof(struct rte_mbuf, pool) - >> - offsetof(struct rte_mbuf, buf_iova)); >> - mbuf3 =3D (uint64_t *)((uintptr_t)mbuf3 + >> - offsetof(struct rte_mbuf, pool) - >> - offsetof(struct rte_mbuf, buf_iova)); >> + mbuf0 =3D (uint64_t *)((uintptr_t)mbuf0 + offsetof(struct rte_mbuf, >pool)); >> + mbuf1 =3D (uint64_t *)((uintptr_t)mbuf1 + offsetof(struct rte_mbuf, >pool)); >> + mbuf2 =3D (uint64_t *)((uintptr_t)mbuf2 + offsetof(struct rte_mbuf, >pool)); >> + mbuf3 =3D (uint64_t *)((uintptr_t)mbuf3 + offsetof(struct rte_mbuf, >pool)); >> >> if (flags & (NIX_TX_OFFLOAD_OL3_OL4_CSUM_F | >> NIX_TX_OFFLOAD_L3_L4_CSUM_F)) { >> @@ -1091,17 +1079,6 @@ cn9k_nix_xmit_pkts_vector(void *tx_queue, struct >rte_mbuf **tx_pkts, >> xtmp128 =3D vzip2q_u64(len_olflags0, len_olflags1); >> ytmp128 =3D vzip2q_u64(len_olflags2, len_olflags3); >> >> - /* Clear dataoff_iovaX.D[1] bits other than dataoff(15:0) */ >> - const uint64x2_t and_mask0 =3D { >> - 0xFFFFFFFFFFFFFFFF, >> - 0x000000000000FFFF, >> - }; >> - >> - dataoff_iova0 =3D vandq_u64(dataoff_iova0, and_mask0); >> - dataoff_iova1 =3D vandq_u64(dataoff_iova1, and_mask0); >> - dataoff_iova2 =3D vandq_u64(dataoff_iova2, and_mask0); >> - dataoff_iova3 =3D vandq_u64(dataoff_iova3, and_mask0); >> - >> /* >> * Pick only 16 bits of pktlen preset at bits 63:32 >> * and place them at bits 15:0. >> diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethd= ev.h >> index 4cb7c9e90c..abf1e4215f 100644 >> --- a/drivers/net/cnxk/cnxk_ethdev.h >> +++ b/drivers/net/cnxk/cnxk_ethdev.h >> @@ -690,7 +690,6 @@ cnxk_pktmbuf_detach(struct rte_mbuf *m) >> >> m->priv_size =3D priv_size; >> m->buf_addr =3D (char *)m + mbuf_size; >> - m->buf_iova =3D rte_mempool_virt2iova(m) + mbuf_size; >> m->buf_len =3D (uint16_t)buf_len; >> rte_pktmbuf_reset_headroom(m); >> m->data_len =3D 0; > >I missed it during previous review, but shouldn't the accessor be used >instead? I mean, if the build is done with PA enabled, and another >driver accesses to m->buf_iova, it has to be correct. > Thanks, I will change. >> diff --git a/drivers/net/cnxk/meson.build b/drivers/net/cnxk/meson.build >> index f347e98fce..01489b3a36 100644 >> --- a/drivers/net/cnxk/meson.build >> +++ b/drivers/net/cnxk/meson.build >> @@ -194,3 +194,4 @@ foreach flag: extra_flags >> endforeach >> >> headers =3D files('rte_pmd_cnxk.h') >> +pmd_iova_as_va =3D true >> diff --git a/drivers/raw/cnxk_bphy/meson.build >b/drivers/raw/cnxk_bphy/meson.build >> index 14147feaf4..781ed63e05 100644 >> --- a/drivers/raw/cnxk_bphy/meson.build >> +++ b/drivers/raw/cnxk_bphy/meson.build >> @@ -10,3 +10,4 @@ sources =3D files( >> 'cnxk_bphy_irq.c', >> ) >> headers =3D files('rte_pmd_bphy.h') >> +pmd_iova_as_va =3D true >> diff --git a/drivers/raw/cnxk_gpio/meson.build >b/drivers/raw/cnxk_gpio/meson.build >> index a75a5b9084..f9aed173b6 100644 >> --- a/drivers/raw/cnxk_gpio/meson.build >> +++ b/drivers/raw/cnxk_gpio/meson.build >> @@ -9,3 +9,4 @@ sources =3D files( >> 'cnxk_gpio_selftest.c', >> ) >> headers =3D files('rte_pmd_cnxk_gpio.h') >> +pmd_iova_as_va =3D true >> -- >> 2.25.1 >>