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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 3cea71e4-4deb-4582-2b22-08d7e9dbfb6c X-MS-Exchange-CrossTenant-originalarrivaltime: 26 Apr 2020 12:18:51.8547 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: UjBtl40dJLiabQzNbG9X7GopqaG5/HvD5MNiPRi2iFyedUJ1URHlM1nPvYNUmG1oQBe+jrHXM0wbujDz0+IjX9Yrdlw/VYp+VwqSHUT0NPQ= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR11MB4686 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH v3] lib/timer: relax barrier for status update X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Phil Yang > Sent: Sunday, April 26, 2020 2:36 AM > To: thomas@monjalon.net > Cc: Carrillo, Erik G ; rsanford@akamai.com; > dev@dpdk.org; david.marchand@redhat.com; Honnappa Nagarahalli > ; Gavin Hu ; nd > ; nd > Subject: RE: [dpdk-dev] [PATCH v3] lib/timer: relax barrier for status up= date >=20 > > -----Original Message----- > > From: Thomas Monjalon > > Sent: Sunday, April 26, 2020 1:18 AM > > To: Phil Yang > > Cc: erik.g.carrillo@intel.com; rsanford@akamai.com; dev@dpdk.org; > > david.marchand@redhat.com; Honnappa Nagarahalli > > ; Gavin Hu ; nd > > > > Subject: Re: [dpdk-dev] [PATCH v3] lib/timer: relax barrier for status > > update > > > > 24/04/2020 09:24, Phil Yang: > > > Volatile has no ordering semantics. The rte_timer structure defines > > > timer status as a volatile variable and uses the rte_r/wmb barrier > > > to guarantee inter-thread visibility. > > > > > > This patch optimized the volatile operation with c11 atomic > > > operations and one-way barrier to save the performance penalty. > > > According to the timer_perf_autotest benchmarking results, this > > > patch can uplift 10%~16% timer appending performance, 3%~20% timer > > > resetting performance and > > 45% > > > timer callbacks scheduling performance on aarch64 and no loss in > > > performance for x86. > > > > > > Suggested-by: Honnappa Nagarahalli > > > Signed-off-by: Phil Yang > > > Reviewed-by: Gavin Hu > > > Acked-by: Erik Gabriel Carrillo > > [...] > > > --- a/lib/librte_timer/rte_timer.h > > > +++ b/lib/librte_timer/rte_timer.h > > > @@ -101,7 +101,7 @@ struct rte_timer > > > - volatile union rte_timer_status status; /**< Status of timer. */ > > > + union rte_timer_status status; /**< Status of timer. */ > > > > Unfortunately, I cannot merge this patch because it breaks the ABI: > > > > [C]'function void rte_timer_init(rte_timer*)' at rte_timer.c:214:1 > > has some indirect sub-type changes: > > parameter 1 of type 'rte_timer*' has sub-type changes: > > in pointed to type 'struct rte_timer' at rte_timer.h:100:1: > > type size hasn't changed > > 1 data member changes (2 filtered): > > type of 'volatile rte_timer_status rte_timer::status' changed: > > entity changed from 'volatile rte_timer_status' to 'union > > rte_timer_status' at rte_timer.h:67:1 > > type size hasn't changed > > >=20 > I think we can revert it to the original definition of rte_timer and keep= the > union rte_timer_status volatile-qualified. > Because with or without this 'volatile' qualify, it generates the same co= de on > aarch64 and x86. > So it seems acceptable to ignore it to make the ABI compatible? >=20 > Thank, > Phil I was wondering about this also. Is the performance improvement on aarch64= still the same in that case? Thanks, Erik