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Fri, 4 Oct 2024 11:49:32 +0000 From: Amit Prakash Shukla To: Vidya Sagar Velumuri , "fengchengwen@huawei.com" , "kevin.laatz@intel.com" , "bruce.richardson@intel.com" CC: Jerin Jacob , Anoob Joseph , Vidya Sagar Velumuri , Aakash Sasidharan , Tejasree Kondoj , Gowrishankar Muthukrishnan , "dev@dpdk.org" Subject: RE: [EXTERNAL] [PATCH v2 1/2] test/dma: update the sg test to verify wrap around case Thread-Topic: [EXTERNAL] [PATCH v2 1/2] test/dma: update the sg test to verify wrap around case Thread-Index: AQHakjkjULcbTiy+QEu4EHzl/2c8ubJ3glUQ Date: Fri, 4 Oct 2024 11:49:32 +0000 Message-ID: References: <20240416123747.4133884-1-vvelumuri@marvell.com> <20240419090734.43613-1-vvelumuri@marvell.com> In-Reply-To: <20240419090734.43613-1-vvelumuri@marvell.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-publictraffictype: Email x-ms-traffictypediagnostic: SJ0PR18MB5161:EE_|IA2PR18MB6084:EE_ x-ms-office365-filtering-correlation-id: b0e8ad48-a9b8-49e1-5700-08dce46a9c98 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: marvell.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SJ0PR18MB5161.namprd18.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: b0e8ad48-a9b8-49e1-5700-08dce46a9c98 X-MS-Exchange-CrossTenant-originalarrivaltime: 04 Oct 2024 11:49:32.4244 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: lFUUD2KQ3JAMWgcj+G6BqHQTFXvYOx1GXE4D3FidvhGK6vqk4LPuC2Ey2hikmhwyQpT50CQeXEfsJpCbpJjUk5jxeH+c6/UyViwnKBhVwR4= X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA2PR18MB6084 X-Proofpoint-ORIG-GUID: 6lWOIkPfPpV8E8dVZxja6m5YNcIEa9ss X-Proofpoint-GUID: 6lWOIkPfPpV8E8dVZxja6m5YNcIEa9ss X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: Vidya Sagar Velumuri > Sent: Friday, April 19, 2024 2:38 PM > To: fengchengwen@huawei.com; kevin.laatz@intel.com; > bruce.richardson@intel.com > Cc: Jerin Jacob ; Anoob Joseph > ; Vidya Sagar Velumuri ; > Aakash Sasidharan ; Tejasree Kondoj > ; Gowrishankar Muthukrishnan > ; dev@dpdk.org > Subject: [EXTERNAL] [PATCH v2 1/2] test/dma: update the sg test to verify > wrap around case >=20 > Prioritize security for external emails: Confirm sender and content safet= y > before clicking links or opening attachments >=20 > ---------------------------------------------------------------------- > Run the sg test in a loop to verify wrap around case. > Total number commands submitted to be more than the number descriptors > allocated to verify the scenario. >=20 > Signed-off-by: Vidya Sagar Velumuri diff --git > a/app/test/test_dmadev.c b/app/test/test_dmadev.c index > 143e1bcd68..7462e90831 100644 > --- a/app/test/test_dmadev.c > +++ b/app/test/test_dmadev.c > @@ -393,34 +393,26 @@ test_stop_start(int16_t dev_id, uint16_t vchan) } >=20 > static int > -test_enqueue_sg_copies(int16_t dev_id, uint16_t vchan) > +test_enqueue_sg(int16_t dev_id, uint16_t vchan, unsigned int n_sge, > +unsigned int test_len) > { > - unsigned int src_len, dst_len, n_sge, len, i, j, k; > char orig_src[COPY_LEN], orig_dst[COPY_LEN]; > - struct rte_dma_info info =3D { 0 }; > + unsigned int src_len, dst_len, i, j, k; > enum rte_dma_status_code status; > uint16_t id, n_src, n_dst; >=20 > - if (rte_dma_info_get(dev_id, &info) < 0) > - ERR_RETURN("Failed to get dev info"); > - > - if (info.max_sges < 2) > - ERR_RETURN("Test needs minimum 2 SG pointers"); > - > - n_sge =3D info.max_sges; > - > for (n_src =3D 1; n_src <=3D n_sge; n_src++) { > for (n_dst =3D 1; n_dst <=3D n_sge; n_dst++) { > /* Normalize SG buffer lengths */ > - len =3D COPY_LEN; > - len -=3D (len % (n_src * n_dst)); > - dst_len =3D len / n_dst; > - src_len =3D len / n_src; > - > + unsigned int len =3D test_len - (test_len % (n_src * > n_dst)); > struct rte_dma_sge sg_src[n_sge], sg_dst[n_sge]; > struct rte_mbuf *src[n_sge], *dst[n_sge]; > char *src_data[n_sge], *dst_data[n_sge]; >=20 > + dst_len =3D len / n_dst; > + src_len =3D len / n_src; > + if (dst_len =3D=3D 0 || src_len =3D=3D 0) > + continue; > + > for (i =3D 0 ; i < len; i++) > orig_src[i] =3D rte_rand() & 0xFF; >=20 > @@ -511,6 +503,27 @@ test_enqueue_sg_copies(int16_t dev_id, uint16_t > vchan) > return 0; > } >=20 > +static int > +test_enqueue_sg_copies(int16_t dev_id, uint16_t vchan) { > + struct rte_dma_info info =3D { 0 }; > + unsigned int n_sge, len; > + int loop_count =3D 0; > + > + if (rte_dma_info_get(dev_id, &info) < 0) > + ERR_RETURN("Failed to get dev info"); > + > + n_sge =3D RTE_MIN(info.max_sges, TEST_SG_MAX); > + len =3D COPY_LEN; > + > + do { > + test_enqueue_sg(dev_id, vchan, n_sge, len); > + loop_count++; > + } while (loop_count * n_sge * n_sge < TEST_RINGSIZE * 3); > + > + return 0; > +} > + > /* Failure handling test cases - global macros and variables for those t= ests*/ > #define COMP_BURST_SZ 16 > #define OPT_FENCE(idx) ((fence && idx =3D=3D 8) ? RTE_DMA_OP_FLAG_FENCE = : > 0) diff --git a/app/test/test_dmadev_api.c b/app/test/test_dmadev_api.c > index d40c05cfbf..6a07ed593b 100644 > --- a/app/test/test_dmadev_api.c > +++ b/app/test/test_dmadev_api.c > @@ -16,7 +16,6 @@ extern int test_dma_api(uint16_t dev_id); >=20 > #define TEST_MEMCPY_SIZE 1024 > #define TEST_WAIT_US_VAL 50000 > -#define TEST_SG_MAX 64 >=20 > static int16_t test_dev_id; > static int16_t invalid_dev_id; > diff --git a/app/test/test_dmadev_api.h b/app/test/test_dmadev_api.h inde= x > 33fbc5bd41..a03f7acd4f 100644 > --- a/app/test/test_dmadev_api.h > +++ b/app/test/test_dmadev_api.h > @@ -2,4 +2,6 @@ > * Copyright(c) 2021 HiSilicon Limited > */ >=20 > +#define TEST_SG_MAX 64 > + > int test_dma_api(uint16_t dev_id); > -- > 2.25.1 Acked-by: Amit Prakash Shukla Thanks