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Wed, 7 Oct 2020 19:15:37 +0000 Received: from SN6PR11MB2574.namprd11.prod.outlook.com ([fe80::902d:8f85:ea05:a7a]) by SN6PR11MB2574.namprd11.prod.outlook.com ([fe80::902d:8f85:ea05:a7a%4]) with mapi id 15.20.3455.021; Wed, 7 Oct 2020 19:15:36 +0000 From: "Eads, Gage" To: "McDaniel, Timothy" CC: "dev@dpdk.org" , "Carrillo, Erik G" , "Van Haaren, Harry" , "jerinj@marvell.com" Thread-Topic: [PATCH 09/22] event/dlb2: add queue and port default conf Thread-Index: AQHWiHpXwwYn2QGQAUW8GPzR722Xz6mMqz9Q Date: Wed, 7 Oct 2020 19:15:36 +0000 Message-ID: References: <1599855987-25976-1-git-send-email-timothy.mcdaniel@intel.com> <1599855987-25976-10-git-send-email-timothy.mcdaniel@intel.com> In-Reply-To: <1599855987-25976-10-git-send-email-timothy.mcdaniel@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-version: 11.5.1.3 dlp-product: dlpe-windows dlp-reaction: no-action authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; 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DIR:OUT; SFP:1102; x-ms-exchange-antispam-messagedata: TxcHJPVvty5hIdUKfQRf8HqYRJa4yj1PaGj+lcNaHsDtX+aV7JUWALX6+pZKg1IU0OwBIACb90aOc+HxYgxzyHBDNBk2Bk/U9wp5NFkcUGAF1GGqJYsI4Qd3IazJl9SRpXAMCfvQLgzr2cxiWaMffKkSTJ0SKAJsiZEgkWArhYaQcXlcCrJriiyZ35e8bQiXZZmnpIFadOSqyub7y0UzDgW6ajZxDoztI+pi2GV1ngOTKqKnW2cwsgG5yms4EVekpTDlJoYF/a5BY8Yz4xIqXsxwhmDjLe6/dZ+Mar0eqP/ekE0wvla8gl2Dm0S5ME62EydqBWKlvBLIOpYXoWSBMDO1UnAqdJq1bERHfiUqfwBJz4r22XEVROAoTtXWKnUDoNseJYiM905qdfNGwmPN/nQ/qEhIaqakQChgYHgBXVdaYT6rNJZzj2bjcBQOir44PzOq6z6WNt6BSc0RdwQF0hvq7aXdmHrNp8A292WZikzCKE0Cqw3A+qzr+lkSgkgdyzByHle2HdHX4O99VQu3IZEsqLJEyS5pmfibNDN6v9gd0zaKuhhByzD38pSp2ymwGZpKZn1kGGTxVwkcvNwA9TQbdbcJzkJmF3My7LhpUO/vpBPlwnUT7fTWYLrZ+1khxNe+OVFWXT66Yt1mirJi5g== Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SN6PR11MB2574.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: dc3d5dce-bf93-4a12-431a-08d86af55ec1 X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Oct 2020 19:15:36.0721 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: c/fnCbAEYAmW2ZX7eDdG72nczsuz6n6JLEhkQvy5qRFtBx3FwN+d0onYtT/93iR/SaJhNKgclBC29EVkuJcyDw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR11MB4718 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH 09/22] event/dlb2: add queue and port default conf X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: McDaniel, Timothy > Sent: Friday, September 11, 2020 3:26 PM > Cc: dev@dpdk.org; Carrillo, Erik G ; Eads, Gag= e > ; Van Haaren, Harry ; > jerinj@marvell.com > Subject: [PATCH 09/22] event/dlb2: add queue and port default conf >=20 > Add support for getting the queue and port default configuration. >=20 > Signed-off-by: Timothy McDaniel > --- > drivers/event/dlb2/dlb2.c | 33 +++++++++++++++++++++++++++++++++ > 1 file changed, 33 insertions(+) >=20 > diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c > index 58e953b..9ff371a 100644 > --- a/drivers/event/dlb2/dlb2.c > +++ b/drivers/event/dlb2/dlb2.c > @@ -698,12 +698,45 @@ dlb2_eventdev_configure(const struct rte_eventdev > *dev) > } >=20 > static void > +dlb2_eventdev_port_default_conf_get(struct rte_eventdev *dev, > + uint8_t port_id, > + struct rte_event_port_conf *port_conf) > +{ > + RTE_SET_USED(port_id); > + struct dlb2_eventdev *dlb2; > + > + dlb2 =3D dlb2_pmd_priv(dev); > + > + /* FIXME: Arbitrary values */ Leftover FIXME. Hopefully not too arbitrary :p. > + port_conf->new_event_threshold =3D dlb2->new_event_limit; > + port_conf->dequeue_depth =3D 32; > + port_conf->enqueue_depth =3D DLB2_MAX_ENQUEUE_DEPTH; > + port_conf->event_port_cfg =3D 0; > +} > + > +static void > +dlb2_eventdev_queue_default_conf_get(struct rte_eventdev *dev, > + uint8_t queue_id, > + struct rte_event_queue_conf *queue_conf) > +{ > + RTE_SET_USED(dev); > + RTE_SET_USED(queue_id); > + /* FIXME: Arbitrary values */ Ditto > + queue_conf->nb_atomic_flows =3D 1024; > + queue_conf->nb_atomic_order_sequences =3D 64; > + queue_conf->event_queue_cfg =3D 0; > + queue_conf->priority =3D 0; > +} Thanks, Gage